概要信息：

 


 

SLOS190G − FEBRUARY 1997 − REVISED MAY 2004
1POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

 Output Swing Includes Both Supply Rails

 Low Noise . . . 9 nV/√Hz Typ at f = 1 kHz

 Low Input Bias Current . . . 1 pA Typ

 Fully Specified for Both Single-Supply and
Split-Supply Operation

 Common-Mode Input Voltage Range
Includes Negative Rail

 High-Gain Bandwidth . . . 2.2 MHz Typ

 High Slew Rate . . . 3.6 V/µs Typ

 Low Input Offset Voltage 
950 µV Max at TA = 25°C

 Macromodel Included

 Performance Upgrades for the TS272,
TS274, TLC272, and TLC274

 Available in Q-Temp Automotive 
HighRel Automotive Applications
Configuration Control / Print Support
Qualification to Automotive Standards
   
description
The TLC2272 and TLC2274 are dual and
quadruple operational amplifiers from Texas
Instruments. Both devices exhibit rail-to-rail
output performance for increased dynamic range
in single- or split-supply applications. The
TLC227x family offers 2 MHz of bandwidth and
3 V/µs of slew rate for higher speed applications.
These devices offer comparable ac performance
while having better noise, input offset voltage, and
power dissipation than existing CMOS
operational amplifiers. The TLC227x has a noise
voltage of 9 nV/√Hz, two times lower than
competitive solutions.
The TLC227x, exhibiting high input impedance
and low noise, is excellent for small-signal
conditioning for high-impedance sources, such as
piezoelectric transducers. Because of the micro-
power dissipation levels, these devices work well
in hand-held monitoring and remote-sensing
applications. In addition, the rail-to-rail output
feature, with single- or split-supplies, makes this
family a great choice when interfacing with analog-to-digital converters (ADCs). For precision applications, the
TLC227xA family is available with a maximum input offset voltage of 950 µV. This family is fully characterized
at 5 V and ±5 V.
The TLC2272/4 also makes great upgrades to the TLC272/4 or TS272/4 in standard designs. They offer
increased output dynamic range, lower noise voltage, and lower input offset voltage. This enhanced feature set
allows them to be used in a wider range of applications. For applications that require higher output drive and
wider input voltage range, see the TLV2432 and TLV2442 devices.
If the design requires single amplifiers, see the TLV2211/21/31 family. These devices are single rail-to-rail
operational amplifiers in the SOT-23 package. Their small size and low power consumption, make them ideal
for high density, battery-powered equipment.
Copyright  2004, Texas Instruments Incorporated
 
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Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Advanced LinCMOS is a trademark of Texas Instruments.
|VDD±| − Supply Voltage − V
10
8
6
4
4 6 8
12
14
16
10 12 14 16
MAXIMUM PEAK-TO-PEAK OUTPUT VOLTAGE
vs
SUPPLY VOLTAGE
TA = 25°C
IO = ±50 µA
IO = ±500 µA
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	  


 

SLOS190G − FEBRUARY 1997 − REVISED MAY 2004
2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC2272 AVAILABLE OPTIONS
PACKAGED DEVICES
TA
VIOmax
At 25°C
SMALL
OUTLINE†
(D)
CERAMIC
LCC
(FK)
CERAMIC
DIP
(JG)
PLASTIC DIP
(P)
TSSOP‡
(PW)
CERAMIC
FLAT PACK
(U)
0°C to 70°C
950 µV TLC2272ACD — — TLC2272ACP TLC2272ACPW —
2.5 mV TLC2272CD — — TLC2272CP TLC2272CPW —
950 µV TLC2272AID — — TLC2272AIP — —
−40°C to 125°C
2.5 mV TLC2272ID — — TLC2272IP TLC2272IPW —
950 µV TLC2272AQD — —
—
TLC2272AQPW —
2.5 mV TLC2272QD — — TLC2272QPW —
−55°C to 125°C 950 µV TLC2272AMD TLC2272AMFK TLC2272AMJG TLC2272AMP
—
TLC2272AMU
2.5 mV TLC2272MD TLC2272MFK TLC2272MJG TLC2272MP TLC2272MU
† The D packages are available taped and reeled. Add R suffix to the device type (e.g., TLC2272CDR).
‡ The PW package is available taped and reeled. Add R suffix to the device type (e.g., TLC2272PWR).
§ Chips are tested at 25°C.
TLC2274 AVAILABLE OPTIONS
PACKAGED DEVICES
TA
VIOmax
AT 25°C
SMALL 
OUTLINE†
(D)
CERAMIC
LCC
(FK)
CERAMIC 
DIP
(J)
PLASTIC
DIP
(N)
TSSOP‡
(PW)
CERAMIC
FLAT PACK
(W)
0°C to 70°C
950 µV TLC2274ACD
— —
TLC2274ACN TLC2274ACPW
—2.5 mV TLC2274CD TLC2274CN TLC2274CPW
950 µV TLC2274AID
— —
TLC2274AIN TLC2274AIPW
—
−40°C to 125°C
2.5 mV TLC2274ID TLC2274IN TLC2274IPW
950 µV TLC2274AQD
— — — — —2.5 mV TLC2274QD
−55°C to 125°C 950 µV TLC2274AMD TLC2274AMFK TLC2274AMJ TLC2274AMN
—
TLC2274AMW
2.5 mV TLC2274MD TLC2274MFK TLC2274MJ TLC2274MN TLC2274MW
† The D packages are available taped and reeled. Add R suffix to device type (e.g., TLC2274CDR).
‡ The PW package is available taped and reeled.
§ Chips are tested at 25°C.

 

	

	  


 

SLOS190G − FEBRUARY 1997 − REVISED MAY 2004
3POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
1
2
3
4
8
7
6
5
1OUT
1IN−
1IN+
VDD−/GND
VDD+
2OUT
2IN−
2IN+
TLC2272
D, JG, P, OR PW PACKAGE
(TOP VIEW)
1
2
3
4 
5
6
7
14
13
12
11
10
9
8
1OUT
1IN−
1IN+
VDD+
2IN+
2IN−
2OUT
4OUT
4IN−
4IN+
VDD−
3IN+
3IN−
3OUT
3 2 1 20 19
9 10 11 12 13
4
5
6
7
8
18
17
16
15
14
4IN+
NC
VDD−
NC
3IN+
1IN+
NC
VDD+
NC
2IN+
1I
N
 −
1O
U
T
N
C
3I
N
 −
4I
N
 −
2I
N
 −
2O
U
T
N
C
NC − No internal connection
3O
U
T
4O
U
T
TLC2274
D, J, N, PW, OR W PACKAGE
(TOP VIEW)
TLC2274
FK PACKAGE
(TOP VIEW)
3 2 1 20 19
9 10 11 12 13
4
5
6
7
8
18
17
16
15
14
NC
2 OUT
NC
2 IN−
NC
NC
1 IN−
NC
1 IN+
NC
N
C
1O
U
T
N
C
N
C
N
C
N
C
V
   
   
/G
N
D
N
C
2 
IN
+
V
TLC2272
FK PACKAGE
(TOP VIEW)
D
D
−
D
D
+
1
2
3
4 
5
10
9
8
7
6
NC
1 OUT
1 IN−
1 IN+
VDD−/GND
NC
VDD+
2 OUT
2 IN−
2 IN+
TLC2272
U PACKAGE
(TOP VIEW)

 

	

	  


 

SLOS190G − FEBRUARY 1997 − REVISED MAY 2004
4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
equivalent schematic (each amplifier)
Q3 Q6 Q9 Q12 Q14 Q16
Q2 Q5 Q7 Q8 Q10 Q11
D1
Q17Q15Q13
Q4Q1
R5
C1
VDD+
IN+
IN−
R3 R4 R1 R2
OUT
VDD−
ACTUAL DEVICE COMPONENT COUNT†
COMPONENT TLC2272 TLC2274
Transistors 38 76
Resistors 26 52
Diodes 9 18
Capacitors 3 6
† Includes both amplifiers and all ESD, bias, and trim circuitry

 

	

	  


 

SLOS190G − FEBRUARY 1997 − REVISED MAY 2004
5POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage, VDD+ (see Note 1) 8 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 
Supply voltage, VDD− (see Note 1) −8 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 
Differential input voltage, VID (see Note 2) ±16 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 
Input voltage range, VI (any input, see Note 1) VDD− − 0.3 V to VDD+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 
Input current, II (any input) ±5 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 
Output current, IO ±50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 
Total current into VDD+ ±50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 
Total current out of VDD− ±50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 
Duration of short-circuit current at (or below) 25°C (see Note 3) unlimited. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 
Package thermal impedance, θJA (see Notes 4 and 5): D package (8 pin) 97.1°C/W. . . . . . . . . . . . . . . . . . . . 
D package (14 pin) 86.2°C/W. . . . . . . . . . . . . . . . . . . 
N package 79.7°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . 
P package 84.6°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . 
PW package (8 pin) 149°C/W. . . . . . . . . . . . . . . . . . . 
PW package (14 pin) 113°C/W. . . . . . . . . . . . . . . . . . 
Package thermal impedance, θJC (see Notes 4 and 5): FK package 5.6°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . 
J package 15.1°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . 
U package 14.7°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . 
Operating free-air temperature range, TA: C suffix 0°C to 70°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 
I, Q suffix −40°C to 125°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 
M suffix −55°C to 125°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 
Storage temperature range −65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: D, N, P or PW package 260°C. . . . . . . . . . 
Lead temperature 1,6 mm (1/16 inch) from case for 60 seconds: J or U package 300°C. . . . . . . . . . . . . . . . . 
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltage values, except differential voltages, are with respect to the midpoint between VDD+ and VDD −.
2. Differential voltages are at IN+ with respect to IN−. Excessive current will flow if input is brought below VDD− − 0.3 V.
3. The output may be shorted to either supply. Temperature and/or supply voltages must be limited to ensure that the maximum
dissipation rating is not exceeded.
4. Maximum power dissipation is a function of TJ(max), θJA, and TA. The maximum allowable power dissipation at any allowable
ambient temperature is PD = (TJ(max) − TA)/θJA. Operating at the absolute maximum TJ of 150°C can affect reliability.
5. The package thermal impedance is calculated in accordance with JESD 51-7 (plastic) or MIL-STD-883 Method 1012 (ceramic).
recommended operating conditions
C SUFFIX I SUFFIX Q SUFFIX M SUFFIX
UNIT
MIN MAX MIN MAX MIN MAX MIN MAX
Supply voltage, VDD± ±2.2 ±8 ±2.2 ±8 ±2.2 ±8 ±2.2 ±8 V
Input voltage, VI VDD− VDD+ −1.5 VDD− VDD+ −1.5 VDD− VDD+ −1.5 VDD− VDD+ −1.5 V
Common-mode input voltage, VIC VDD− VDD+ −1.5 VDD− VDD+ −1.5 VDD− VDD+ −1.5 VDD− VDD+ −1.5 V
Operating free-air temperature, TA 0 70 −40 125 −40 125 −55 125 °C

 

	

	  


 

SLOS190G − FEBRUARY 1997 − REVISED MAY 2004
6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC2272C electrical characteristics at specified free-air temperature, VDD = 5 V (unless otherwise
noted)
PARAMETER TEST CONDITIONS TA†
TLC2272C TLC2272AC
UNIT
MIN TYP MAX MIN TYP MAX
VIO Input offset voltage
25°C 300 2500 300 950
µV
Full range 3000 1500
αVIO
Temperature coefficient 25°C
2 2 µV/°C
of input offset voltage
V  = 0 V,
to 70°C
Input offset voltage
long-term drift
(see Note 4)
IC
VDD± = ±2.5 V,
VO = 0 V, 
RS = 50 Ω
25°C 0.002 0.002 µV/mo
IIO Input offset current
25°C 0.5 60 0.5 60
pA
Full range 100 100
IIB Input bias current
25°C 1 60 1 60
pA
Full range 100 100
25°C 0 to 4
−0.3
0 to 4
−0.3
VICR
Common-mode input
RS = 50 Ω |VIO | ≤ 5 mV
to 4.2 to 4.2
V
voltage
,  
Full range
0 to 0 to
3.5 3.5
IOH = −20 µA 25°C 4.99 4.99
High-level output IOH = −200 µA
25°C 4.85 4.93 4.85 4.93
VOH voltage
Full range 4.85 4.85 V
IOH = −1 mA
25°C 4.25 4.65 4.25 4.65
Full range 4.25 4.25
VIC = 2.5 V, IOL = 50 µA 25°C 0.01 0.01
VIC = 2.5 V, IOL = 500 µA
25°C 0.09 0.15 0.09 0.15
VOL Low-level output voltage Full range 0.15 0.15 V
VIC = 2.5 V, IOL = 5 
A
25°C 0.9 1.5 0.9 1.5
Full range 1.5 1.5
Large-signal differential VIC = 2.5 V, RL = 10 kه
25°C 15 35 15 35
AVD voltage amplification VO = 1 V to 4 V
Full range 15 15 V/mV
RL = 1 mΩ‡ 25°C 175 175
rid
Differential input
resistance
25°C 1012 1012 Ω
ri
Common-mode input
resistance
25°C 1012 1012 Ω
ci
Common-mode input
capacitance
f = 10 kHz, P package 25°C 8 8 pF
zo
Closed-loop output
impedance
f = 1 MHz, AV = 10 25°C 140 140 Ω
CMRR
Common-mode VIC = 0 V to 2.7 V, 25°C 70 75 70 75
dB
rejection ratio VO = 2.5 V, RS = 50 Ω Full range 70 70
kSVR
Supply-voltage
rejection ratio
VDD = 4.4 V to 16 V,VIC = VDD/2, 25°C 80 95 80 95
dB
(∆VDD/∆VIO)
No load Full range 80 80
IDD Supply current VO = 2.5 V, No load
25°C 2.2 3 2.2 3
mA
Full range 3 3
† Full range is 0°C to 70°C.
‡ Referenced to 0 V
NOTE 6: Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated
to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.

 

	

	  


 

SLOS190G − FEBRUARY 1997 − REVISED MAY 2004
7POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC2272C operating characteristics at specified free-air temperature, VDD = 5 V
PARAMETER TEST CONDITIONS TA†
TLC2272C TLC2272AC
UNIT
MIN TYP MAX MIN TYP MAX
Slew rate at unity
VO = 0.5 V to 2.5 V,
R  = 10 k ‡, C  = 100 pF‡
25°C 2.3 3.6 2.3 3.6
SR gain L Ω L Full
1.7 1.7
V/µs
range
Vn
Equivalent input f = 10 Hz 25°C 50 50
nV/√Hznoise voltage f = 1 kHz 25°C 9 9
VNPP
Peak-to-peak
equivalent input
f = 0.1 Hz to 1 Hz 25°C 1 1
V
noise voltage f = 0.1 Hz to 10 Hz 25°C 1.4 1.4
µ
In
Equivalent input
noise current
25°C 0.6 0.6 fA/√Hz
Total harmonic
VO = 0.5 V to 2.5 V, AV = 1 0.0013% 0.0013%
THD + N distortion plus noise
f = 20 kHz,
R  = 10 k ‡,
AV = 10 25°C 0.004% 0.004%
L Ω AV = 100 0.03% 0.03%
Gain-bandwidth
product
f = 10 kHz, 
CL = 100 pF‡
RL = 10 kΩ‡, 25°C 2.18 2.18 MHz
BOM
Maximum
output-swing
bandwidth
VO(PP) = 2 V, 
RL = 10 kه,
AV = 1, 
CL = 100 pF‡ 25°C 1 1 MHz
AV = −1,
To 0.1% 1.5 1.5
ts Settling time
Step = 0.5 V to 2.5 V,
‡ 25°C sRL = 10 kΩ ,
‡ To 0.01% 2.6 2.6
µ
CL = 100 pF
φm
Phase margin at
unity gain RL = 10 kΩ‡, CL = 100 pF‡
25°C 50° 50°
Gain margin 25°C 10 10 dB
† Full range is 0°C to 70°C.
‡ Referenced to 0 V

 

	

	  


 

SLOS190G − FEBRUARY 1997 − REVISED MAY 2004
8 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC2272C electrical characteristics at specified free-air temperature, VDD± = ±5 V (unless
otherwise specified)
PARAMETER TEST CONDITIONS TA†
TLC2272C TLC2272AC
UNIT
MIN TYP MAX MIN TYP MAX
VIO Input offset voltage
25°C 300 2500 300 950
µV
Full range 3000 1500
αVIO
Temperature coefficient of 25°C
2 2 µV/°C
input offset voltage to 70°C
Input offset voltage
long-term drift
(see Note 4)
VIC = 0 V,
RS = 50 Ω
VO = 0 V, 25°C 0.002 0.002 µV/mo
IIO Input offset current
25°C 0.5 60 0.5 60
pA
Full range 100 100
IIB Input bias current
25°C 1 60 1 60
pA
Full range 100 100
−5 −5.3 −5 −5.3
25°C to to to to
VICR
Common-mode input
RS = 50 Ω |VIO | ≤5 mV
4 4.2 4 4.2
V
voltage
,  
−5 −5
Full range to to
3.5 3.5
IO = −20 µA 25°C 4.99 4.99
Maximum positive peak IO = −200 µA
25°C 4.85 4.93 4.85 4.93
VOM+ output voltage
Full range 4.85 4.85 V
IO = −1 mA
25°C 4.25 4.65 4.25 4.65
Full range 4.25 4.25
VIC = 0 V, IO = 50 µA 25°C −4.99 −4.99
Maximum negative peak VIC = 0 V, IO = 500 µA
25°C −4.85 −4.91 −4.85 −4.91
VOM− output voltage
Full range −4.85 −4.85 V
VIC = 0 V, IO = 5 
A
25°C −3.5 −4.1 −3.5 −4.1
Full range −3.5 −3.5
Large-signal differential RL = 10 kΩ
25°C 25 50 25 50
AVD voltage amplification VO = ±4 V Full range 25 25 V/mV
RL = 1 mΩ 25°C 300 300
rid
Differential input
resistance
25°C 1012 1012 Ω
ri
Common-mode input
resistance
25°C 1012 1012 Ω
ci
Common-mode input
capacitance
f = 10 kHz, P package 25°C 8 8 pF
zo
Closed-loop output
impedance
f = 1 MHz, AV = 10 25°C 130 130 Ω
CMRR
Common-mode rejection VIC = −5 V to 2.7 V, 25°C 75 80 75 80
dB
ratio VO = 0 V, RS = 50 Ω Full range 75 75
kSVR
Supply-voltage rejection VDD± = 2.2 V to ±8 V, 25°C 80 95 80 95
dB
ratio (∆VDD± /∆VIO) VIC = 0 V, No load Full range 80 80
IDD Supply current VO = 0 V No load
25°C 2.4 3 2.4 3
mA
Full range 3 3
† Full range is 0°C to 70°C.
NOTE 4: Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated
to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.

 

	

	  


 

SLOS190G − FEBRUARY 1997 − REVISED MAY 2004
9POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC2272C operating characteristics at specified free-air temperature, VDD± = ±5 V
PARAMETER TEST CONDITIONS TA†
TLC2272C TLC2272AC
UNIT
MIN TYP MAX MIN TYP MAX
Slew rate at VO = ±2.3 V, RL = 10 kΩ,
25°C 2.3 3.6 2.3 3.6
SR
unity gain CL = 100 pF Full
1.7 1.7
V/µs
range
Vn
Equivalent input f = 10 Hz 25°C 50 50
nV/√Hznoise voltage f = 1 kHz 25°C 9 9
VNPP
Peak-to-peak
equivalent input
f = 0.1 Hz to 1 Hz 25°C 1 1
V
noise voltage f = 0.1 Hz to 10 Hz 25°C 1.4 1.4
µ
In
Equivalent input
noise current
25°C 0.6 0.6 fA/√Hz
Total harmonic VO = ±2.3 V, AV = 1 0.0011% 0.0011%
THD + N distortion pulse
duration
f = 20 kHz,
R  = 10 k
AV = 10 25°C 0.004% 0.004%
L Ω AV = 100 0.03% 0.03%
Gain-bandwidth f = 10 kHz, RL = 10 kΩ,
25°C 2.25 2.25 MHzproduct CL = 100 pF
BOM
Maximum output- VO(PP) = 4.6 V, AV = 1,
25°C 0.54 0.54 MHzswing bandwidth RL = 10 kΩ, CL = 100 pF
AV = −1,
To 0.1% 1.5 1.5
ts Settling time
Step = −2.3 V to 2.3 V,
25°C sRL = 10 kΩ,
To 0.01% 3.2 3.2
µ
CL = 100 pF
φm
Phase margin at
unity gain RL = 10 kΩ, CL = 100 pF
25°C 52° 52°
Gain margin 25°C 10 10 dB
† Full range is 0°C to 70°C.

 

	

	  


 

SLOS190G − FEBRUARY 1997 − REVISED MAY 2004
10 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC2274C electrical characteristics at specified free-air temperature, VDD = 5 V (unless otherwise
noted)
PARAMETER TEST CONDITIONS TA†
TLC2274C TLC2274AC
UNIT
MIN TYP MAX MIN TYP MAX
VIO Input offset voltage
25°C 300 2500 300 950
µV
Full range 3000 1500
αVIO
Temperature coefficient
of input offset voltage
25°C
to 70°C 2 2 µV/°C
Input offset voltage
long-term drift 
(see Note 4)
VDD± = ±2.5 V,
VO = 0 V,
VIC = 0 V,
RS = 50 Ω
25°C 0.002 0.002 µV/mo
IIO Input offset current
25°C 0.5 60 0.5 60
pA
Full range 100 100
IIB Input bias current
25°C 1 60 1 60
pA
Full range 100 100
VICR
Common-mode input
RS = 50 Ω, VIO ≤ 5 mV,
25°C
0
to 4
−0.3
to 4.2
0
to 4
−0.3
to 4.2
V
voltage
Full range
0 to
3.5
0 to
3.5
IOH = −20 µA 25°C 4.99 4.99
IOH = −200 µA
25°C 4.85 4.93 4.85 4.93
VOH High-level output voltage Full range 4.85 4.85 V
IOH = −1 mA
25°C 4.25 4.65 4.25 4.65
Full range 4.25 4.25
VIC = 2.5 V, IOL = 50 µA 25°C 0.01 0.01
VIC = 2.5 V,      IOL = 500 µA
25°C 0.09 0.15 0.09 0.15
VOL Low-level output voltage Full range 0.15 0.15 V
VIC = 2.5 V, IOL = 5 
A
25°C 0.9 1.5 0.9 1.5
Full range 1.5 1.5
Large-signal differential VIC = 2.5 V, RL = 10 kه
25°C 15 35 15 35
AVD voltage amplification VO = 1 V to 4 V
Full range 15 15 V/mV
RL = 1 mΩ‡ 25°C 175 175
rid
Differential input
resistance
25°C 1012 1012 Ω
ri
Common-mode input
resistance
25°C 1012 1012 Ω
ci
Common-mode input
capacitance
f = 10 kHz, N package 25°C 8 8 pF
zo
Closed-loop output
impedance
f = 1 MHz, AV = 10 25°C 140 140 Ω
CMRR
Common-mode rejection VIC = 0 V to 2.7 V, 25°C 70 75 70 75
dB
ratio VO = 2.5 V, RS = 50 Ω Full range 70 70
kSVR
Supply-voltage rejection VDD = 4.4 V to 16 V, 25°C 80 95 80 95
dB
ratio (∆VDD/∆VIO) VIC = VDD/2, No load Full range 80 80
IDD Supply current VO = 2.5 V, No load
25°C 4.4 6 4.4 6
mA
Full range 6 6
† Full range is 0°C to 70°C.
‡ Referenced to 0 V
NOTE 4: Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated
to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.

 

	

	  


 

SLOS190G − FEBRUARY 1997 − REVISED MAY 2004
11POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC2274C operating characteristics at specified free-air temperature, VDD = 5 V
PARAMETER TEST CONDITIONS TA†
TLC2274C TLC2274AC
UNIT
MIN TYP MAX MIN TYP MAX
Slew rate at VO = 0.5 V to 2.5 V,
25°C 2.3 3.6 2.3 3.6
SR
unity gain RL = 10 kΩ‡, CL = 100 pF‡ Full
1.7 1.7
V/µs
range
Vn
Equivalent input f = 10 Hz 25°C 50 50
nV/√Hznoise voltage f = 1 kHz 25°C 9 9
VN(PP)
Peak-to-peak 
equivalent input
f = 0.1 Hz to 1 Hz 25°C 1 1
V
noise voltage f = 0.1 Hz to 10 Hz 25°C 1.4 1.4
µ
In
Equivalent input
noise current
25°C 0.6 0.6 fA /√Hz
Total harmonic VO = 0.5 V to 2.5 V, AV = 1 0.0013% 0.0013%
THD + N distortion plus
noise
f = 20 kHz,
R  = 10 k ‡
AV = 10 25°C 0.004% 0.004%
L Ω AV = 100 0.03% 0.03%
Gain-bandwidth
product
f = 10 kHz,
CL = 100 pF‡
RL = 10 kΩ‡, 25°C 2.18 2.18 MHz
BOM
Maximum
output-swing
bandwidth
VO(PP) = 2 V,
RL = 10 kه,
AV = 1, 
CL = 100 pF‡ 25°C 1 1 MHz
AV = −1, To 0.1% 1.5 1.5
ts Settling time
Step = 0.5 V to 2.5 V,
25°C s
RL = 10 kه,
‡ To 0.01% 2.6 2.6
µ
CL = 100 pF
φm
Phase margin at
unity gain RL = 10 kΩ‡, CL = 100 pF‡
25°C 50° 50°
Gain margin 25°C 10 10 dB
† Full range is 0°C to 70°C.
‡ Referenced to 0 V

 

	

	  


 

SLOS190G − FEBRUARY 1997 − REVISED MAY 2004
12 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC2274C electrical characteristics at specified free-air temperature, VDD± = ±5 V (unless
otherwise noted)
PARAMETER TEST CONDITIONS TA†
TLC2274C TLC2274AC
UNIT
MIN TYP MAX MIN TYP MAX
VIO Input offset voltage
25°C 300 2500 300 950
µV
Full range 3000 1500
αVIO
Temperature coefficient of 25°C
2 2 µV/°C
input offset voltage to 70°C
Input offset voltage long-term
drift (see Note 4)
VIC = 0 V,
RS = 50 Ω
VO = 0 V, 25°C 0.002 0.002 µV/mo
IIO Input offset current
25°C 0.5 60 0.5 60
pA
Full range 100 100
IIB Input bias current
25°C 1 60 1 60
pA
Full range 100 100
VICR
Common-mode input
RS = 50 Ω |VIO | ≤  5 mV
25°C
−5
to 4
−5.3
to 4.2
−5
to 4
−5.3
to 4.2
V
voltage
,  
Full range
−5
to 3.5
−5
to 3.5
IO = −20 µA 25°C 4.99 4.99
Maximum positive peak output IO = −200 µA
25°C 4.85 4.93 4.85 4.93
VOM+ voltage
Full range 4.85 4.85 V
IO = −1 mA
25°C 4.25 4.65 4.25 4.65
Full range 4.25 4.25
VIC = 0 V, IO = 50 µA 25°C −4.99 −4.99
Maximum negative peak VIC = 0 V, IO = 500 µA
25°C
−4.8
5
−4.91 −4.85 −4.91
VOM− output voltage Full range
−4.8
5
−4.85
V
VIC = 0 V, IO = −5 mA
25°C −3.5 −4.1 −3.5 −4.1
Full range −3.5 −3.5
Large-signal differential RL = 10 kΩ
25°C 25 50 25 50
AVD voltage amplification
VO = ±4 V Full range 25 25 V/mV
RL = 1 MΩ 25°C 300 300
rid Differential input resistance 25°C 1012 1012 Ω
ri
Common-mode input
resistance
25°C 1012 1012 Ω
ci
Common-mode input
capacitance
f = 10 kHz, N package 25°C 8 8 pF
zo Closed-loop output impedance f = 1 MHz, AV = 10 25°C 130 130 Ω
CMRR Common-mode rejection ratio
VIC = −5 V to 2.7 V, 25°C 75 80 75 80
dB
VO = 0 V, RS = 50 Ω Full range 75 75
kSVR
Supply-voltage rejection ratio VDD± = ±2.2 V to ±8 V, 25°C 80 95 80 95
dB
(∆VDD± /∆VIO) VIC = 0 V, No load Full range 80 80
IDD Supply current VO = 0 V, No load
25°C 4.8 6 4.8 6
mA
Full range 6 6
† Full range is 0°C to 70°C.
NOTE 4: Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated
to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.

 

	

	  


 

SLOS190G − FEBRUARY 1997 − REVISED MAY 2004
13POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC2274C operating characteristics at specified free-air temperature, VDD± = ±5 V
PARAMETER TEST CONDITIONS TA†
TLC2274C TLC2274AC
UNIT
MIN TYP MAX MIN TYP MAX
Slew rate at unity VO = ±2.3 V, RL = 10 kΩ,
25°C 2.3 3.6 2.3 3.6
SR
gain CL = 100 pF Full
1.7 1.7
V/µs
range
Vn
Equivalent input f = 10 Hz 25°C 50 50
nV/√Hznoise voltage f = 1 Hz 25°C 9 9
VN(PP)
Peak-to-peak
equivalent input
f = 0.1 Hz to 1 Hz 25°C 1 1
V
noise voltage f = 0.1 Hz to 10 Hz 25°C 1.4 1.4
µ
In
Equivalent input
noise current
25°C 0.6 0.6 fA /√Hz
Total harmonic VO = ±2.3 V, AV = 1 0.0011% 0.0011%
THD + N distortion plus
noise
f = 20 kHz,
R  = 10 k
AV = 10 25°C 0.004% 0.004%
L Ω AV = 100 0.03% 0.03%
Gain-bandwidth f = 10 kHz, RL= 10 kΩ,
25°C 2.25 2.25 MHzproduct CL = 100 pF
BOM
Maximum 
output-swing
VO(PP) = 4.6 V, AV = 1,
25°C 0.54 0.54 MHz
bandwidth RL = 10 kΩ, CL = 100 pF
AV = −1,
To 0.1% 1.5 1.5
ts Settling time
Step = −2.3 V to 2.3 V,
25°C sRL = 10 kΩ, 
To 0.01% 3.2 3.2
µ
CL = 100 pF
φm
Phase margin at
unity gain RL = 10 kΩ, CL = 100 pF
25°C 52° 52°
Gain margin 25°C 10 10 dB
† Full range is 0°C to 70°C.

 

	

	  


 

SLOS190G − FEBRUARY 1997 − REVISED MAY 2004
14 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC2272I electrical characteristics at specified free-air temperature, VDD = 5 V (unless otherwise
noted)
PARAMETER TEST CONDITIONS T †
TLC2272I TLC2272AI
UNITA MIN TYP MAX MIN TYP MAX
VIO Input offset voltage
25°C 300 2500 300 950
µV
Full range 3000 1500
αVIO
Temperature coefficient 25°C
2 2 µV/°C
of input offset voltage to 85°C
Input offset voltage
long-term drift
(see Note 4) VIC = 0 V,
V  = 0 V,
VDD ± = ±2.5 V
R  = 50 
25°C 0.002 0.002 µV/mo
O S Ω 25°C 0.5 60 0.5 60
IIO Input offset current −40°C to 85°C 150 150 pA
Full range 800 800
25°C 1 60 1 60
IIB Input bias current −40°C to 85°C 150 150 pA
Full range 800 800
25°C 0 to 4
−0.3
0 to 4
−0.3
VICR
Common-mode input
RS = 50 Ω |VIO | ≤  5 mV
to 4.2 to 4.2
V
voltage
,  
Full range
0 to 0 to
3.5 3.5
IOH = −20 µA 25°C 4.99 4.99
High-level output IOH = −200 µA
25°C 4.85 4.93 4.85 4.93
VOH voltage
Full range 4.85 4.85 V
IOH = −1 mA
25°C 4.25 4.65 4.25 4.65
Full range 4.25 4.25
VIC = 2.5 V, IOL = 50 µA 25°C 0.01 0.01
Low-level output VIC = 2.5 V, IOL = 500 µA
25°C 0.09 0.15 0.09 0.15
VOL voltage
Full range 0.15 0.15 V
VIC = 2.5 V, IOL = 5 
A
25°C 0.9 1.5 0.9 1.5
Full range 1.5 1.5
Large-signal differential V  = 2.5 V, RL = 10 kه
25°C 15 35 15 35
AVD voltage amplification
IC
VO = 1 V to 4 V
Full range 15 15 V/mV
RL = 1 mΩ‡ 25°C 175 175
rid
Differential input
resistance
25°C 1012 1012 Ω
ri
Common-mode input
resistance
25°C 1012 1012 Ω
ci
Common-mode input
capacitance
f = 10 kHz, P package 25°C 8 8 pF
zo
Closed-loop output
impedance
f = 1 MHz, AV = 10 25°C 140 140 Ω
CMRR
Common-mode VIC = 0 V to 2.7 V, 25°C 70 75 70 75
dB
rejection ratio VO = 2.5 V, RS = 50 Ω Full range 70 70
kSVR
Supply-voltage
rejection ratio
VDD = 4.4 V to 16 V, 25°C 80 95 80 95
dB
(∆VDD /∆VIO)
VIC = VDD /2, No load Full range 80 80
IDD Supply current VO = 2.5 V, No load
25°C 2.2 3 2.2 3
mA
Full range 3 3
† Full range is − 40°C to 125°C.
‡ Referenced to 0 V
NOTE 4: Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated
to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.

 

	

	  


 

SLOS190G − FEBRUARY 1997 − REVISED MAY 2004
15POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC2272I operating characteristics at specified free-air temperature, VDD = 5 V
PARAMETER TEST CONDITIONS TA†
TLC2272I TLC2272AI
UNIT
MIN TYP MAX MIN TYP MAX
Slew rate at VO = 0.5 V to 2.5 V,
25°C 2.3 3.6 2.3 3.6
SR
unity gain RL = 10 kΩ‡, CL = 100 pF‡ Full
1.7 1.7
V/µs
range
Vn
Equivalent input f = 10 Hz 25°C 50 50
nV√Hznoise voltage f = 1 kHz 25°C 9 9
VNPP
Peak-to-peak
equivalent input
f = 0.1 Hz to 1 Hz 25°C 1 1
V
noise voltage f = 0.1 Hz to 10 Hz 25°C 1.4 1.4
µ
In
Equivalent input
noise current
25°C 0.6 0.6 fA√Hz
Total harmonic VO = 0.5 V to 2.5 V, AV = 1 0.0013% 0.0013%
THD + N distortion plus
noise
f = 20 kHz,
R  = 10 k ‡
AV = 10 25°C 0.004% 0.004%
L Ω AV = 100 0.03% 0.03%
Gain-bandwidth f = 10 kHz, RL = 10 kه,
25°C 2.18 2.18 MHzproduct CL = 100 pF‡
BOM
Maximum output- VO(PP) = 2 V,
‡
AV = 1,
‡ 25°C 1 1 MHzswing bandwidth RL = 10 kΩ , CL = 100 pF
AV = −1,
To 0.1% 1.5 1.5
ts Settling time
Step = 0.5 V to 2.5 V,
‡ 25°C sRL = 10 kΩ ,
‡ To 0.01% 2.6 2.6
µ
CL = 100 pF
φm
Phase margin at
unity gain RL = 10 kΩ‡, CL = 100 pF‡
25°C 50° 50°
Gain margin 25°C 10 10 dB
† Full range is − 40°C to 125°C.
‡ Referenced to 0 V

 

	

	  


 

SLOS190G − FEBRUARY 1997 − REVISED MAY 2004
16 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC2272I electrical characteristics at specified free-air temperature, VDD± = ±5 V (unless otherwise
noted)
PARAMETER TEST CONDITIONS T †
TLC2272I TLC2272AI
UNITA MIN TYP MAX MIN TYP MAX
VIO Input offset voltage
25°C 300 2500 300 950
µV
Full range 3000 1500
αVIO
Temperature
coefficient of input
offset voltage
25°C to 85°C 2 2 µV/°C
Input offset voltage
long-term drift
(see Note 4)
VIC = 0 V,
RS = 50 Ω
VO = 0 V,
25°C 0.002 0.002 µV/mo
25°C 0.5 60 0.5 60
IIO Input offset current −40°C to 85°C 150 150 pA
Full range 800 800
25°C 1 60 1 60
IIB Input bias current −40°C to 85°C 150 150 pA
Full range 800 800
VICR
Common-mode
RS = 50 Ω |VIO | ≤ 5 mV
25°C −5 to
4
−5.3
to 4.2
−5 to
4
−5.3
to 4.2
V
input voltage
,  
Full range
−5 to
3.5
−5 to
3.5
IO = −20 µA 25°C 4.99 4.99
Maximum positive IO = −200 µA
25°C 4.85 4.93 4.85 4.93
VOM + peak output voltage
Full range 4.85 4.85 V
IO = −1 mA
25°C 4.25 4.65 4.25 4.65
Full range 4.25 4.25
VIC = 0 V, IO = 50 µA 25°C −4.99 −4.99
Maximum negative VIC = 0 V, IO = 500 µA
25°C −4.85 −4.91 −4.85 −4.91
VOM − peak output voltage
Full range −4.85 −4.85 V
VIC = 0 V, IO = 5 
A
25°C −3.5 −4.1 −3.5 −4.1
Full range −3.5 −3.5
Large-signal RL = 10 kΩ
25°C 25 50 25 50
AVD differential voltage
amplification
VO = ±4 V Full range 25 25 V/mV
RL = 1 mΩ 25°C 300 300
rid
Differential input
resistance
25°C 1012 1012 Ω
ri
Common-mode
input resistance
25°C 1012 1012 Ω
ci
Common-mode
input capacitance
f = 10 kHz, P package 25°C 8 8 pF
zo
Closed-loop output
impedance
f = 1 MHz, AV = 10 25°C 130 130 Ω
CMRR
Common-mode VIC = −5 V to 2.7 V, 25°C 75 80 75 80
dB
rejection ratio VO = 0 V, RS = 50 Ω Full range 75 75
kSVR
Supply-voltage
rejection ratio VDD = 4.4 V to 16 V,
25°C 80 95 80 95
dB
(∆VDD ± /∆VIO)
VIC = VDD /2, No load Full range 80 80
IDD Supply current VO = 0 V, No load
25°C 2.4 3 2.4 3
mA
Full range 3 3
† Full range is − 40°C to 125°C.
NOTE 4: Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated
to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.

 

	

	  


 

SLOS190G − FEBRUARY 1997 − REVISED MAY 2004
17POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC2272I operating characteristics at specified free-air temperature, VDD± = ±5 V
PARAMETER TEST CONDITIONS TA†
TLC2272I TLC2272AI
UNIT
MIN TYP MAX MIN TYP MAX
Slew rate at VO = ±2.3 V, RL = 10 kΩ,
25°C 2.3 3.6 2.3 3.6
SR unity gain CL = 100 pF Full
1.7 1.7
V/µs
range
Vn
Equivalent input f = 10 Hz 25°C 50 50
nV√Hznoise voltage f = 1 kHz 25°C 9 9
VNPP
Peak-to-peak
equivalent input
f = 0.1 Hz to 1 Hz 25°C 1 1
V
noise voltage f = 0.1 Hz to 10 Hz 25°C 1.4 1.4
µ
In
Equivalent input
noise current
25°C 0.6 0.6 fA√Hz
Total harmonic VO = ±2.3 V AV = 1 0.0011% 0.0011%
THD + N distortion plus
noise
RL = 10 kΩ,
f = 20 kHz
AV = 10 25°C 0.004% 0.004%
AV = 100 0.03% 0.03%
Gain-bandwidth f = 10 kHz, RL = 10 kΩ,
25°C 2.25 2.25 MHzproduct CL = 100 pF
BOM
Maximum
output-swing
VO(PP) = 4.6 V, AV = 1,
25°C 0.54 0.54 MHz
bandwidth
RL = 10 kΩ, CL = 100 pF
AV = −1,
To 0.1% 1.5 1.5
ts Settling time
Step = −2.3 V to 2.3 V,
25°C sRL = 10 kΩ,
To 0.01% 3.2 3.2
µ
CL = 100 pF
φm
Phase margin at
unity gain RL = 10 kΩ, CL = 100 pF
25°C 52° 52°
Gain margin 25°C 10 10 dB
† Full range is −40°C to 125°C.

 

	

	  


 

SLOS190G − FEBRUARY 1997 − REVISED MAY 2004
18 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC2274I electrical characteristics at specified free-air temperature, VDD = 5 V (unless otherwise
noted)
PARAMETER TEST CONDITIONS TA
†
TLC2274I TLC2274AI
UNIT
MIN TYP MAX MIN TYP MAX
VIO Input offset voltage
25°C 300 2500 300 950
µV
Full range 3000 1500
αVIO
Temperature coefficient of
25°C to 85°C 2 2 µV/°C
input offset voltage
Input offset voltage
long-term drift (see Note 4)
VDD ± = ±2.5 V, VIC = 0 V,
25°C 0.002 0.002 µV/mo
VO = 0 V, RS = 50 Ω 25°C 0.5 60 0.5 60
IIO Input offset current −40°C to 85°C 150 150 pA
Full range 800 800
25°C 1 60 1 60
IIB Input bias current −40°C to 85°C 150 150 pA
Full range 800 800
VICR
Common-mode input
RS = 50 Ω |VIO | ≤  5 mV
25°C 0 to
4
−0.3
to 4.2
0 to
4
−0.3
to 4.2
V
voltage
,  
Full range
0 to
3.5
0 to
3.5
IOH = −20 µA 25°C 4.99 4.99
IOH = −200 µA
25°C 4.85 4.93 4.85 4.93
VOH High-level output voltage Full range 4.85 4.85 V
IOH = −1 mA
25°C 4.25 4.65 4.25 4.65
Full range 4.25 4.25
VIC = 2.5 V, IOL = 50 µA 25°C 0.01 0.01
VIC = 2.5 V, IOL = 500 µA
25°C 0.09 0.15 0.09 0.15
VOL Low-level output voltage Full range 0.15 0.15 V
VIC = 2.5 V, IOL = 5 
A
25°C 0.9 1.5 0.9 1.5
Full range 1.5 1.5
Large-signal differential V  = 2.5 V, RL = 10 kه
25°C 15 35 15 35
AVD voltage amplification
IC
VO = 1 V to 4 V
Full range 15 15 V/mV
RL = 1 MΩ‡ 25°C 175 175
rid Differential input resistance 25°C 1012 1012 Ω
ri
Common-mode input
resistance
25°C 1012 1012 Ω
ci
Common-mode input
capacitance
f = 10 kHz, N package 25°C 8 8 pF
zo
Closed-loop output
impedance
f = 1 MHz, AV = 10 25°C 140 140 Ω
CMRR
Common-mode rejection VIC = 0 V to 2.7 V, 25°C 70 75 70 75
dB
ratio VO = 2.5 V, RS = 50 Ω Full range 70 70
kSVR
Supply-voltage rejection VDD = 4.4 V to 16 V, 25°C 80 95 80 95
dB
ratio (∆VDD /∆VIO) VIC = VDD /2, No load Full range 80 80
IDD Supply current VO = 2.5 V, No load
25°C 4.4 6 4.4 6
mA
Full range 6 6
† Full range is − 40°C to 125°C.
‡ Referenced to 0 V
NOTE 4: Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated
to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.

 

	

	  


 

SLOS190G − FEBRUARY 1997 − REVISED MAY 2004
19POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC2274I operating characteristics at specified free-air temperature, VDD = 5 V
PARAMETER TEST CONDITIONS TA†
TLC2274I TLC2274AI
UNIT
MIN TYP MAX MIN TYP MAX
Slew rate at unity VO = 0.5 V to 2.5 V,
25°C 2.3 3.6 2.3 3.6
SR
gain RL = 10 kΩ‡, CL = 100 pF‡ Full
1.7 1.7
V/µs
range
Vn
Equivalent input f = 10 Hz 25°C 50 50
nV/√Hznoise voltage f = 1 kHz 25°C 9 9
VN(PP)
Peak-to-peak
equivalent input
f = 0.1 Hz to 1 Hz 25°C 1 1
V
noise voltage f = 0.1 Hz to 10 Hz 25°C 1.4 1.4
µ
In
Equivalent input
noise current
25°C 0.6 0.6 fA /√Hz
Total harmonic
VO = 0.5 V to 2.5 V, AV = 1 0.0013% 0.0013%
THD + N distortion plus noise
f = 20 kHz,
R  = 10 k ‡
AV = 10 25°C 0.004% 0.004%
L Ω AV = 100 0.03% 0.03%
Gain-bandwidth f = 10 kHz, RL = 10 kه,
25°C 2.18 2.18 MHzproduct CL = 100 pF‡
BOM
Maximum
output-swing
VO(PP) = 2 V,
‡
AV = 1,
‡ 25°C 1 1 MHz
bandwidth RL = 10 kΩ , CL = 100 pF
AV = −1,
To 0.1% 1.5 1.5
ts Settling time
Step = 0.5 V to 2.5 V,
‡ 25°C sRL = 10 kΩ ,
‡ To 0.01% 2.6 2.6
µ
CL = 100 pF
φm
Phase margin at
unity gain RL = 10 kΩ‡, CL = 100 pF‡
25°C 50° 50°
Gain margin 25°C 10 10 dB
† Full range is − 40°C to 125°C.
‡ Referenced to 0 V

 

	

	  


 

SLOS190G − FEBRUARY 1997 − REVISED MAY 2004
20 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC2274I electrical characteristics at specified free-air temperature, VDD± = ±5 V (unless otherwise
noted)
PARAMETER TEST CONDITIONS TA
†
TLC2274I TLC2274AI
UNIT
MIN TYP MAX MIN TYP MAX
VIO Input offset voltage
25°C 300 2500 300 950
µV
Full range 3000 1500
αVIO
Temperature coefficient of
25°C to 85°C 2 2 µV/°C
input offset voltage
Input offset voltage
long-term drift (see Note 4)
VIC = 0 V, VO = 0 V,
25°C 0.002 0.002 µV/mo
RS = 50 Ω 25°C 0.5 60 0.5 60
IIO Input offset current −40°C to 85°C 150 150 pA
Full range 800 800
25°C 1 60 1 60
IIB Input bias current −40°C to 85°C 150 150 pA
Full range 800 800
VICR
Common-mode input
RS = 50 Ω VIO | ≤ 5 mV
25°C −5 to
4
−5.3
to 4.2
−5 to
4
−5.3
to 4.2
V
voltage
,  
Full range
−5 to
3.5
−5 to
3.5
IO = −20 µA 25°C 4.99 4.99
Maximum positive peak IO = −200 µA
25°C 4.85 4.93 4.85 4.93
VOM + output voltage
Full range 4.85 4.85 V
IO = −1 mA
25°C 4.25 4.65 4.25 4.65
Full range 4.25 4.25
VIC = 0 V, IO = 50 µA 25°C −4.99 −4.99
Maximum negative peak VIC = 0 V, IO = 500 µA
25°C −4.85 −4.91 −4.85 −4.91
VOM − output voltage
Full range −4.85 −4.85 V
VIC = 0 V, IO = 5 
A
25°C −3.5 −4.1 −3.5 −4.1
Full range −3.5 −3.5
Large-signal differential RL = 10 kΩ
25°C 25 50 25 50
AVD voltage amplification
VO = ±4 V Full range 25 25 V/mV
RL = 1 MΩ 25°C 300 300
rid Differential input resistance 25°C 1012 1012 Ω
ri
Common-mode input
resistance
25°C 1012 1012 Ω
ci
Common-mode input
capacitance
f = 10 kHz, N package 25°C 8 8 pF
zo
Closed-loop output
impedance
f = 1 MHz, AV = 10 25°C 130 130 Ω
CMRR
Common-mode rejection VIC = −5 V to 2.7 V, 25°C 75 80 75 80
dB
ratio VO = 0 V, RS = 50 Ω Full range 75 75
kSVR
Supply-voltage rejection VDD ± = ±2.2 V to ±8 V, 25°C 80 95 80 95
dB
ratio (∆VDD ± /∆VIO) VIC = 0 V, No load Full range 80 80
IDD Supply current VO = 0 V, No load
25°C 4.8 6 4.8 6
mA
Full range 6 6
† Full range is − 40°C to 125°C.
NOTE 4: Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated
to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.

 

	

	  


 

SLOS190G − FEBRUARY 1997 − REVISED MAY 2004
21POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC2274I operating characteristics at specified free-air temperature, VDD± = ±5 V
PARAMETER TEST CONDITIONS TA†
TLC2274I TLC2274AI
UNIT
MIN TYP MAX MIN TYP MAX
Slew rate at unity VO = ±2.3 V, RL = 10 kΩ,
25°C 2.3 3.6 2.3 3.6
SR
gain CL = 100 pF Full
1.7 1.7
V/µs
range
Vn
Equivalent input f = 10 Hz 25°C 50 50
nV/√Hznoise voltage f = 1 kHz 25°C 9 9
VN(PP)
Peak-to-peak 
equivalent input
f = 0.1 Hz to 1 Hz 25°C 1 1
V
noise voltage f = 0.1 Hz to 10 Hz 25°C 1.4 1.4
µ
In
Equivalent input
noise current
25°C 0.6 0.6 fA/√Hz
Total harmonic VO = ±2.3 V, AV = 1 0.0011% 0.0011%
THD + N distortion plus
noise
RL = 10 kΩ,
f = 20 kHz
AV = 10 25°C 0.004% 0.004%
AV = 100 0.03% 0.03%
Gain-bandwidth f = 10 kHz, RL = 10 kΩ,
25°C 2.25 2.25 MHzproduct CL = 100 pF
BOM
Maximum output- VO(PP) = 4.6 V, AV = 1,
25°C 0.54 0.54 MHzswing bandwidth RL = 10 kΩ, CL = 100 pF
AV = −1,
To 0.1% 1.5 1.5
ts Settling time
Step = −2.3 V to 2.3 V,
25°C sRL = 10 kΩ,
To 0.01% 3.2 3.2
µ
CL = 100 pF
φm
Phase margin at
unity gain RL = 10 kΩ, CL = 100 pF
25°C 52° 52°
Gain margin 25°C 10 10 dB
† Full range is −40°C to 125°C.

 

	

	  


 

SLOS190G − FEBRUARY 1997 − REVISED MAY 2004
22 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC2272Q and TLC2272M electrical characteristics at specified free-air temperature, VDD = 5 V
(unless otherwise noted)
PARAMETER TEST CONDITIONS TA†
TLC2272Q,
TLC2272M
TLC2272AQ,
TLC2272AM UNIT
MIN TYP MAX MIN TYP MAX
VIO Input offset voltage
25°C 300 2500 300 950
µV
Full range 3000 1500
αVIO
Temperature coefficient 25°C
2 2 µV/°C
of input offset voltage to 125°C
Input offset voltage long-
term drift (see Note 4)
VIC = 0 V,
VO = 0 V,
VDD± = ±2.5 V,
RS = 50 Ω
25°C 0.002 0.002 µV/mo
IIO Input offset current
25°C 0.5 60 0.5 60
pA
Full range 800 800
IIB Input bias current
25°C 1 60 1 60
pA
Full range 800 800
VICR
Common-mode input
RS = 50 Ω |VIO | ≤  5 mV
25°C
0
to 4
−0.3
to 4.2
0
to 4
−0.3
to 4.2
V
voltage
,  
Full range
0
to 3.5
0
to 3.5
IOH = −20 µA 25°C 4.99 4.99
High-level output IOH = −200 µA
25°C 4.85 4.93 4.85 4.93
VOH voltage
Full range 4.85 4.85 V
IOH = −1 mA
25°C 4.25 4.65 4.25 4.65
Full range 4.25 4.25
VIC = 2.5 V, IOL = 50 µA 25°C 0.01 0.01
VIC = 2.5 V, IOL = 500 µA
25°C 0.09 0.15 0.09 0.15
VOL Low-level output voltage Full range 0.15 0.15 V
VIC = 2.5 V, IOL = 5 
A
25°C 0.9 1.5 0.9 1.5
Full range 1.5 1.5
Large-signal 
VIC = 2.5 V, RL = 10 kه
25°C 10 35 10 35
AVD differential voltage
VO = 1 V to 4 V
Full range 10 10 V/mV
amplification RL = 1 mΩ‡ 25°C 175 175
rid
Differential input
resistance
25°C 1012 1012 Ω
ri
Common-mode input
resistance
25°C 1012 1012 Ω
ci
Common-mode input
capacitance
f = 10 kHz, P package 25°C 8 8 pF
zo
Closed-loop output
impedance
f = 1 MHz, AV = 10 25°C 140 140 Ω
CMRR
Common-mode rejection VIC = 0 V to 2.7 V, 25°C 70 75 70 75
dB
ratio VO = 2.5 V, RS = 50 Ω Full range 70 70
kSVR
Supply-voltage rejection VDD = 4.4 V to 16 V, 25°C 80 95 80 95
dB
ratio (∆VDD/∆VIO) VIC = VDD/2, No load Full range 80 80
IDD Supply current VO = 2.5 V, No load
25°C 2.2 3 2.2 3
mA
Full range 3 3
† Full range is −40°C to 125°C for Q level part, −55°C to 125°C for M level part.
‡ Referenced to 2.5 V
NOTE 4: Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated
to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.

 

	

	  


 

SLOS190G − FEBRUARY 1997 − REVISED MAY 2004
23POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC2272Q and TLC2272M operating characteristics at specified free-air temperature, VDD = 5 V
PARAMETER TEST CONDITIONS TA†
TLC2272Q,
TLC2272M
TLC2272AQ,
TLC2272AM UNIT
MIN TYP MAX MIN TYP MAX
Slew rate at VO = 1.25 V to 2.75 V, 
25°C 2.3 3.6 2.3 3.6
SR
unity gain RL = 10 kΩ‡, CL = 100 pF‡ Full
1.7 1.7
V/µs
range
Vn
Equivalent input f = 10 Hz 25°C 50 50
nV/√Hznoise voltage f = 1 kHz 25°C 9 9
VNPP
Peak-to-peak
equivalent input
f = 0.1 Hz to 1 Hz 25°C 1 1
V
noise voltage f = 0.1 Hz to 10 Hz 25°C 1.4 1.4
µ
In
Equivalent input
noise current
25°C 0.6 0.6 fA/√Hz
Total harmonic VO = 0.5 V to 2.5 V, AV = 1 0.0013% 0.0013%
THD + N distortion plus
noise
f = 20 kHz,
R  = 10 k ‡,
AV = 10 25°C 0.004% 0.004%
L Ω AV = 100 0.03% 0.03%
Gain-bandwidth f = 10 kHz, RL = 10 kه,
25°C 2.18 2.18 MHzproduct CL = 100 pF‡
BOM
Maximum output- VO(PP) = 2 V,
‡
AV = 1,
‡ 25°C 1 1 MHzswing bandwidth RL = 10 kΩ , CL = 100 pF
AV = −1,
To 0.1% 1.5 1.5
ts Settling time
Step = 0.5 V to 2.5 V,
‡ 25°C sRL = 10 kΩ ,
‡ To 0.01% 2.6 2.6
µ
CL = 100 pF
φm
Phase margin at
unity gain RL = 10 kΩ‡, CL = 100 pF‡
25°C 50° 50°
Gain margin 25°C 10 10 dB
† Full range is −40°C to 125°C for Q level part, −55°C to 125°C for M level part.
‡ Referenced to 2.5 V

 

	

	  


 

SLOS190G − FEBRUARY 1997 − REVISED MAY 2004
24 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC2272Q and TLC2272M electrical characteristics at specified free-air temperature, VDD± = ±5 V
(unless otherwise noted)
PARAMETER TEST CONDITIONS TA†
TLC2272Q,
TLC2272M
TLC2272AQ,
TLC2272AM UNIT
MIN TYP MAX MIN TYP MAX
VIO Input offset voltage
25°C 300 2500 300 950
µV
Full range 3000 1500
αVIO
Temperature coefficient of 25°C
2 2 µV/°C
input offset voltage to 125°C
Input offset voltage
long-term drift 
(see Note 4)
VIC = 0 V,
RS = 50 Ω
VO = 0 V, 25°C 0.002 0.002 µV/mo
IIO Input offset current
25°C 0.5 60 0.5 60
pA
Full range 800 800
IIB Input bias current
25°C 1 60 1 60
pA
Full range 800 800
25 C
−5 −5.3 −5 −5.3
Common-mode input
°
to 4 to 4.2 to 4 to 4.2
VICR RS = 50 Ω |VIO | ≤ 5 mV V
voltage
,  
Full range
−5 −5
to 3.5 to 3.5
IO = −20 µA 25°C 4.99 4.99
Maximum positive peak IO = −200 µA
25°C 4.85 4.93 4.85 4.93
VOM+ output voltage
Full range 4.85 4.85 V
IO = −1 mA
25°C 4.25 4.65 4.25 4.65
Full range 4.25 4.25
VIC = 0 V, IO = 50 µA 25°C −4.99 −4.99
Maximum negative peak VIC = 0 V, IO = 500 µA
25°C −4.85 −4.91 −4.85 −4.91
VOM− output voltage
Full range −4.85 −4.85 V
VIC = 0 V, IO = 5 
A
25°C −3.5 −4.1 −3.5 −4.1
Full range −3.5 −3.5
Large-signal differential RL = 10 kΩ
25°C 20 50 20 50
AVD voltage amplification VO = ±4 V Full range 20 20 V/mV
RL = 1 mΩ 25°C 300 300
rid Differential input resistance 25°C 1012 1012 Ω
ri
Common-mode input
resistance
25°C 1012 1012 Ω
ci
Common-mode input
capacitance
f = 10 kHz, P package 25°C 8 8 pF
zo
Closed-loop output
impedance
f = 1 MHz, AV = 10 25°C 130 130 Ω
CMRR
Common-mode rejection VIC = −5 V to 2.7 V, 25°C 75 80 75 80
dB
ratio VO = 0 V, RS = 50 Ω Full range 75 75
kSVR
Supply-voltage rejection VDD = ±2.2 V to ±8 V, 25°C 80 95 80 95
dB
ratio (∆VDD± /∆VIO) VIC = 0 V, No load Full range 80 80
IDD Supply current VO = 2.5 V, No load
25°C 2.4 3 2.4 3
mA
Full range 3 3
† Full range is −40°C to 125°C for Q level part, −55°C to 125°C for M level part.
NOTE 4: Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated
to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.

 

	

	  


 

SLOS190G − FEBRUARY 1997 − REVISED MAY 2004
25POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC2272Q and TLC2272M operating characteristics at specified free-air temperature, 
VDD± = ±5 V
PARAMETER TEST CONDITIONS TA†
TLC2272Q,
TLC2272M
TLC2272AQ,
TLC2272AM UNIT
MIN TYP MAX MIN TYP MAX
Slew rate at VO = ±1 V, RL = 10 kΩ,
25°C 2.3 3.6 2.3 3.6
SR
unity gain CL = 100 pF Full
1.7 1.7
V/µs
range
Vn
Equivalent input f = 10 Hz 25°C 50 50
nV/√Hznoise voltage f = 1 kHz 25°C 9 9
VNPP
Peak-to-peak
equivalent input
f = 0.1 Hz to 1 Hz 25°C 1 1
V
noise voltage f = 0.1 Hz to 10 Hz 25°C 1.4 1.4
µ
In
Equivalent input
noise current
25°C 0.6 0.6 fA/√Hz
Total harmonic VO = ±2.3 V AV = 1 0.0011% 0.0011%
THD + N distortion plus
noise
RL = 10 kΩ,
f = 20 kHz
AV = 10 25°C 0.004% 0.004%
AV = 100 0.03% 0.03%
Gain-bandwidth f = 10 kHz, RL = 10 kΩ,
25°C 2.25 2.25 MHzproduct CL = 100 pF
BOM
Maximum
output-swing
VO(PP) = 4.6 V, AV = 1,
25°C 0.54 0.54 MHz
bandwidth
RL = 10 kΩ, CL = 100 pF
AV = −1,
To 0.1% 1.5 1.5
ts Settling time
Step = −2.3 V to 2.3 V,
25°C sRL = 10 kΩ,
To 0.01% 3.2 3.2
µ
CL = 100 pF
φm
Phase margin at
unity gain RL = 10 kΩ, CL = 100 pF
25°C 52° 52°
Gain margin 25°C 10 10 dB
† Full range is −40°C to 125°C for Q level part, −55°C to 125°C for M level part.

 

	

	  


 

SLOS190G − FEBRUARY 1997 − REVISED MAY 2004
26 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC2274Q and TLC2274M electrical characteristics at specified free-air temperature, VDD = 5 V
(unless otherwise noted)
PARAMETER TEST CONDITIONS TA†
TLC2274Q,
TLC2274M
TLC2274AQ,
TLC2274AM UNIT
MIN TYP MAX MIN TYP MAX
VIO Input offset voltage
25°C 300 2500 300 950
µV
Full range 3000 1500
αVIO
Temperature coefficient 25°C
2 2 µV/°C
of input offset voltage to 125°C
Input offset voltage
long-term drift
(see Note 4)
VDD± = ±2.5 V,
VO = 0 V,
VIC = 0 V,
RS = 50 Ω
25°C 0.002 0.002 µV/mo
IIO Input offset current
25°C 0.5 60 0.5 60
pA
Full range 800 800
IIB Input bias current
25°C 1 60 1 60
pA
Full range 800 800
25 C
0 −0.3 0 −0.3
Common-mode input
°
to 4 to 4.2 to 4 to 4.2
VICR RS = 50 Ω |VIO | ≤  5 mV V
voltage
,  
Full range
0 to 0 to
3.5 3.5
IOH = −20 µA 25°C 4.99 4.99
High-level output IOH = −200 µA
25°C 4.85 4.93 4.85 4.93
VOH voltage
Full range 4.85 4.85 V
IOH = −1 mA
25°C 4.25 4.65 4.25 4.65
Full range 4.25 4.25
VIC = 2.5 V, IOL = 50 µA 25°C 0.01 0.01
Low-level output
VIC = 2.5 V, 25°C 0.09 0.15 0.09 0.15
VOL voltage
IOL = 500 µA Full range 0.15 0.15 V
VIC = 2.5 V, IOL = 5 
A
25°C 0.9 1.5 0.9 1.5
Full range 1.5 1.5
Large-signal differential VIC = 2.5 V, RL = 10 kه
25°C 10 35 10 35
AVD voltage amplification VO = 1 V to 4 V
Full range 10 10 V/mV
RL = 1 MΩ‡ 25°C 175 175
rid
Differential input
resistance
25°C 1012 1012 Ω
ri
Common-mode input
resistance
25°C 1012 1012 Ω
ci
Common-mode input
capacitance
f = 10 kHz, N package 25°C 8 8 pF
zo
Closed-loop output
impedance
f = 1 MHz, AV = 10 25°C 140 140 Ω
CMRR
Common-mode VIC = 0 V to 2.7 V, 25°C 70 75 70 75
dB
rejection ratio VO = 2.5 V, RS = 50 Ω Full range 70 70
kSVR
Supply-voltage rejection VDD = 4.4 V to 16 V, 25°C 80 95 80 95
dB
ratio (∆VDD/∆VIO) VIC = VDD/2, No load Full range 80 80
IDD Supply current VO = 2.5 V, No load
25°C 4.4 6 4.4 6
mA
Full range 6 6
† Full range is −40°C to 125°C for Q level part, −55°C to 125°C for M level part.
‡ Referenced to 2.5 V
NOTE 4: Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated
to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.

 

	

	  


 

SLOS190G − FEBRUARY 1997 − REVISED MAY 2004
27POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC2274Q and TLC2274M operating characteristics at specified free-air temperature, VDD = 5 V
PARAMETER TEST CONDITIONS TA†
TLC2274Q,
TLC2274M
TLC2274AQ,
TLC2274AM UNIT
MIN TYP MAX MIN TYP MAX
Slew rate at unity VO = 0.5 V to 2.5 V, CL = 100 pF‡
25°C 2.3 3.6 2.3 3.6
SR
gain RL = 10 kه, Full
1.7 1.7
V/µs
range
Vn
Equivalent input f = 10 Hz 25°C 50 50
nV/√Hznoise voltage f = 1 kHz 25°C 9 9
VN(PP)
Peak-to-peak
equivalent input
f = 0.1 Hz to 1 Hz 25°C 1 1
V
noise voltage f = 0.1 Hz to 10 Hz 25°C 1.4 1.4
µ
In
Equivalent input
noise current
25°C 0.6 0.6 fA /√Hz
Total harmonic VO = 0.5 V to 2.5 V, AV = 1 0.0013% 0.0013%
THD + N distortion plus
noise
f = 20 kHz,
R  = 10 k ‡
AV = 10 25°C 0.004% 0.004%
L Ω AV = 100 0.03% 0.03%
Gain-bandwidth f = 10 kHz, RL = 10 kه,
25°C 2.18 2.18 MHzproduct CL = 100 pF‡
BOM
Maximum out-
put-swing band-
VO(PP) = 2 V,
‡
AV = 1,
‡ 25°C 1 1 MHz
width
RL = 10 kΩ , CL = 100 pF
AV = −1,
To 0.1% 1.5 1.5
ts Settling time
Step = 0.5 V to 2.5 V,
‡ 25°C sRL = 10 kΩ ,
‡ To 0.01% 2.6 2.6
µ
CL = 100 pF
φm
Phase margin at
unity gain RL = 10 kΩ‡, CL = 100 pF‡
25°C 50° 50°
Gain margin 25°C 10 10 dB
† Full range is −40°C to 125°C for Q level part, −55°C to 125°C for M level part.
‡ Referenced to 2.5 V

 

	

	  


 

SLOS190G − FEBRUARY 1997 − REVISED MAY 2004
28 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC2274Q and TLC2274M electrical characteristics at specified free-air temperature, VDD± = ±5 V
(unless otherwise noted)
PARAMETER TEST CONDITIONS TA†
TLC2274Q,
TLC2274M
TLC2274AQ,
TLC2274AM UNIT
MIN TYP MAX MIN TYP MAX
VIO Input offset voltage
25°C 300 2500 300 950
V
Full range 3000 1500
µ
VIO
Temperature coefficient of 25°C
2 2 V/°Cα input offset voltage to 125°C µ
Input offset voltage long-
term drift (see Note 4)
VIC = 0 V,
RS = 50 Ω
VO = 0 V, 25°C 0.002 0.002 µV/mo
IIO Input offset current
25°C 0.5 60 0.5 60
pA
Full range 800 800
IIB Input bias current
25°C 1 60 1 60
pA
Full range 800 800
−5 −5.3 −5 −5.3
Common-mode input
25°C to 4 to 4.2 to 4 to 4.2
VICR RS = 50 Ω |VIO | ≤  5 mV Vvoltage ,  
−5 −5
Full range to 3.5 to 3.5
IO = −20 µA 25°C 4.99 4.99
Maximum positive peak IO = −200 A
25°C 4.85 4.93 4.85 4.93
VOM+ output voltage
µ
Full range 4.85 4.85 V
IO = −1 mA
25°C 4.25 4.65 4.25 4.65
Full range 4.25 4.25
VIC = 0 V, IO = 50 µA 25°C −4.99 −4.99
Maximum negative peak VIC = 0 V, IO = 500 A
25°C −4.85 −4.91 −4.85 −4.91
VOM− output voltage
µ
Full range −4.85 −4.85 V
VIC = 0 V, IO = 5 
A
25°C −3.5 −4.1 −3.5 −4.1
Full range −3.5 −3.5
Large-signal differential RL = 10 kΩ
25°C 20 50 20 50
AVD voltage amplification VO = ±4 V Full range 20 20 V/mV
RL = 1 MΩ 25°C 300 300
rid Differential input resistance 25°C 1012 1012 Ω
ri
Common-mode input 
resistance
25°C 1012 1012 Ω
ci
Common-mode input
capacitance
f = 10 kHz, N package 25°C 8 8 pF
zo
Closed-loop output
impedance
f = 1 MHz, AV = 10 25°C 130 130 Ω
CMRR
Common-mode rejection VIC = −5 V to 2.7 V 25°C 75 80 75 80
dBratio VO = 0 V, RS = 50 Ω Full range 75 75
kSVR
Supply-voltage rejection VDD± = ±  2.2 V to ±8 V, 25°C 80 95 80 95
dBratio (∆VDD± /∆VIO) VIC = 0 V, No load Full range 80 80
IDD Supply current VO = 0 V, No load
25°C 4.8 6 4.8 6
mA
Full range 6 6
† Full range is −40°C to 125°C for Q level part, −55°C to 125°C for M level part.
NOTE 4: Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated
to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.

 

	

	  


 

SLOS190G − FEBRUARY 1997 − REVISED MAY 2004
29POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC2274Q and TLC2274M operating characteristics at specified free-air temperature, 
VDD± = ±5 V
PARAMETER TEST CONDITIONS TA†
TLC2274Q,
TLC2274M
TLC2274AQ,
TLC2274AM UNIT
MIN TYP MAX MIN TYP MAX
Slew rate at unity VO = ±2.3 V, RL = 10 kΩ,
25°C 2.3 3.6 2.3 3.6
SR
gain CL = 100 pF Full
1.7 1.7
V/µs
range
Vn
Equivalent input f = 10 Hz 25°C 50 50
nV/√Hznoise voltage f = 1 kHz 25°C 9 9
VN(PP)
Peak-to-peak
equivalent input
f = 0.1 Hz to 1 Hz 25°C 1 1
V
noise voltage f = 0.1 Hz to 10 Hz 25°C 1.4 1.4
µ
In
Equivalent input
noise current
25°C 0.6 0.6 fA /√Hz
Total harmonic VO = ±2.3 V, AV = 1 0.0011% 0.0011%
THD + N distortion plus
noise
RL = 10 kΩ,
f = 20 kHz
AV = 10 25°C 0.004% 0.004%
AV = 100 0.03% 0.03%
Gain-bandwidth f = 10 kHz, RL = 10 kΩ,
25°C 2.25 2.25 MHzproduct CL = 100 pF
BOM
Maximum
output-swing
VO(PP) = 4.6 V, AV = 1,
25°C 0.54 0.54 MHz
bandwidth
RL = 10 kΩ, CL = 100 pF
AV = −1,
To 0.1% 1.5 1.5
ts Settling time
Step = −2.3 V to 2.3 V,
25°C sRL = 10 kΩ,
To 0.01% 3.2 3.2
µ
CL = 100 pF
φm
Phase margin at
unit gain RL = 10 kΩ, CL = 100 pF
25°C 52° 52°
Gain margin 25°C 10 10 dB
† Full range is −40°C to 125°C for Q level part, −55°C to 125°C for M level part.

 

	

	  


 

SLOS190G − FEBRUARY 1997 − REVISED MAY 2004
30 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
Table of Graphs
FIGURE
VIO Input offset voltage
Distribution 1 − 4
vs Common-mode voltage 5, 6
αVIO Input offset voltage temperature coefficient Distribution 7 − 10
IIB /IIO Input bias and input offset current vs Free-air temperature 11
VI Input voltage
vs Supply voltage 12
vs Free-air temperature 13
VOH High-level output voltage vs High-level output current 14
VOL Low-level output voltage vs Low-level output current 15, 16
VOM+ Maximum positive peak output voltage vs Output current 17
VOM− Maximum negative peak output voltage vs Output current 18
VO(PP) Maximum peak-to-peak output voltage vs Frequency 19
IOS Short-circuit output current
vs Supply voltage 20
vs Free-air temperature 21
VO Output voltage vs Differential input voltage 22, 23
Large-signal differential voltage amplification vs Load resistance 24
AVD
Large-signal differential voltage amplification
and phase margin
vs Frequency 25, 26
Large-signal differential voltage amplification vs Free-air temperature 27, 28
zo Output impedance vs Frequency 29, 30
CMRR Common-mode rejection ratio
vs Frequency 31
vs Free-air temperature 32
kSVR Supply-voltage rejection ratio
vs Frequency 33, 34
vs Free-air temperature 35
IDD Supply current
vs Supply voltage 36, 37
vs Free-air temperature 38, 39
SR Slew rate
vs Load capacitance 40
vs Free-air temperature 41
Inverting large-signal pulse response 42, 43
VO
Voltage-follower large-signal pulse response 44, 45
Inverting small-signal pulse response 46, 47
Voltage-follower small-signal pulse response 48, 49
Vn Equivalent input noise voltage vs Frequency 50, 51
Noise voltage over a 10-second period 52
Integrated noise voltage vs Frequency 53
THD + N Total harmonic distortion plus noise vs Frequency 54
Gain-bandwidth product
vs Supply voltage 55
vs Free-air temperature 56
φm Phase margin vs Load capacitance 57
Gain margin vs Load capacitance 58
NOTE: For all graphs where VDD = 5 V, all loads are referenced to 2.5 V.

 

	

	  


 

SLOS190G − FEBRUARY 1997 − REVISED MAY 2004
31POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
VIO − Input Offset Voltage − mV
P
er
ce
n
ta
g
e 
o
f A
m
p
lif
ie
rs
 −
 %
DISTRIBUTION OF TLC2272
INPUT OFFSET VOLTAGE
10
5
0
20
15
−1.6 −1.2 0 0.4 0.8 1.2 1.6
891 Amplifiers From
−0.8 −0.4
2 Wafer Lots
VDD = ±2.5 V
TA = 25°C
Figure 1
VIO − Input Offset Voltage − mV
P
er
ce
n
ta
g
e 
o
f A
m
p
lif
ie
rs
 −
 %
DISTRIBUTION OF TLC2272
INPUT OFFSET VOLTAGE
10
5
0
20
15
−1.6 −1.2 0 0.4 0.8 1.2 1.6−0.8 −0.4
891 Amplifiers From
2 Wafer Lots
VDD = ±5 V
TA = 25°C
Figure 2
Figure 3
VIO − Input Offset Voltage − mV
P
er
ce
n
ta
g
e 
o
f A
m
p
lif
ie
rs
 −
 %
DISTRIBUTION OF TLC2274
INPUT OFFSET VOLTAGE
10
5
0
20
15
0 0.4 0.8 1.2 1.6
992 Amplifiers From
−1.6 −1.2 −0.8 −0.4
2 Wafer Lots
VDD = ±2.5 V
Figure 4
VIO − Input Offset Voltage − mV
P
er
ce
n
ta
g
e 
o
f A
m
p
lif
ie
rs
 −
 %
DISTRIBUTION OF TLC2274
INPUT OFFSET VOLTAGE
10
5
0
20
15
0 0.4 0.8 1.2 1.6
992 Amplifiers From
−1.6 −1.2 −0.8 −0.4
2 Wafer Lots
VDD = ±5 V

 

	

	  


 

SLOS190G − FEBRUARY 1997 − REVISED MAY 2004
32 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
0.5
0
−1
−1 0 1
V
IO
 −
 In
p
u
t 
O
ff
se
t 
Vo
lt
ag
e 
− 
m
V
1
2 3 4 5
V
IO
VIC − Common-Mode Voltage − V
VDD = 5 V
TA = 25°C
RS = 50 Ω
−0.5
INPUT OFFSET VOLTAGE
vs
COMMON-MODE VOLTAGE
Figure 5
0.5
0
−1
−1 0 1
V
IO
 −
 In
p
u
t 
O
ff
se
t 
Vo
lt
ag
e 
− 
m
V
1
2 3 4 5
INPUT OFFSET VOLTAGE
vs
COMMON-MODE VOLTAGE
VIC − Common-Mode Voltage − V
V
IO −0.5
VDD = ±5 V
TA = 25°C
RS = 50 Ω
−6 −5 −4 −3 −2
Figure 6
15
10
5
0
−1 0 1
P
er
ce
n
ta
g
e 
o
f A
m
p
lif
ie
rs
 −
 %
20
25
2 3 4 5
DISTRIBUTION OF TLC2272
vs
INPUT OFFSET VOLTAGE TEMPERATURE
COEFFICIENT†
αVIO − Temperature Coefficient − µV/°C
128 Amplifiers From
2 Wafer Lots
VDD = ±2.5 V
P Package
25°C to 125°C
−5 −4 −3 −2
Figure 7
−5 −4 −3 −2
15
10
5
0
−1 0 1
P
er
ce
n
ta
g
e 
o
f A
m
p
lif
ie
rs
 −
 %
20
25
2 3 4 5
DISTRIBUTION OF TLC2272
vs
INPUT OFFSET VOLTAGE TEMPERATURE
COEFFICIENT†
αVIO − Temperature Coefficient − µV/°C
128 Amplifiers From
2 Wafer Lots
VDD = ±5 V
P Package
25°C to 125°C
Figure 8
† Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.

 

	

	  


 

SLOS190G − FEBRUARY 1997 − REVISED MAY 2004
33POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
15
10
5
0
0 1
P
er
ce
n
ta
g
e 
o
f A
m
p
lif
ie
rs
 −
 %
20
25
2 3 4 5
DISTRIBUTION OF TLC2274
vs
INPUT OFFSET VOLTAGE TEMPERATURE
COEFFICIENT†
αVIO − Temperature Coefficient − µV/°C
−5 −4 −3 −2 −1
128 Amplifiers From
2 Wafer Lots
VDD = ±2.5 V
N Package
TA = 25°C to 125°C
Figure 9
15
10
5
0
P
er
ce
n
ta
g
e 
o
f A
m
p
lif
ie
rs
 −
 %
20
25
DISTRIBUTION OF TLC2274
vs
INPUT OFFSET VOLTAGE TEMPERATURE
COEFFICIENT†
αVIO − Temperature Coefficient − µV/°C
0 1 2 3 4 5−5 −4 −3 −2 −1
128 Amplifiers From
2 Wafer Lots
VDD = ±2.5 V
N Package
TA = 25°C to 125°C
Figure 10
15
10
5
0
25 45 65 85
20
25
30
105 125
INPUT BIAS AND INPUT OFFSET CURRENT†
vs
FREE-AIR TEMPERATURE
TA − Free-Air Temperature − °C
35
VDD = ±2.5 V
VIC = 0 V
VO = 0 V
RS = 50 Ω
IIB
IIO
IIB
 a
n
d
 II
O
 −
 In
p
u
t 
B
ia
s 
an
d
 In
p
u
t 
O
ff
se
t 
C
u
rr
en
ts
 −
 p
A
IBI
I I
O
Figure 11
0
− 2
− 6
− 8
− 10
8
− 4
2 3 4 5 6 7 8
− 
In
p
u
t 
Vo
lt
ag
e 
− 
V
4
2
6
10
INPUT VOLTAGE
vs
SUPPLY VOLTAGE
|VDD±| − Supply Voltage − V
V
I
TA = 25°C 
RS = 50 Ω
|VIO| ≤ 5mV
12
Figure 12
† Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.

 

	

	  


 

SLOS190G − FEBRUARY 1997 − REVISED MAY 2004
34 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
−75 − 25 0 25 50 75 100 125
2
1
0
−1
3
4
5
− 
In
p
u
t 
Vo
lt
ag
e 
− 
V
V
I
INPUT VOLTAGE†
vs
FREE-AIR TEMPERATURE
TA − Free-Air Temperature − °C
|VIO| ≤ 5mV
VDD = 5 V
− 50
Figure 13
V
0H
 −
 H
ig
h
-L
ev
el
 O
u
tp
u
t 
Vo
lt
ag
e 
− 
V
V
O
H
IOH − High-Level Output Current − mA
4
2
1
0
6
3
0 1 2 3 4
5
HIGH-LEVEL OUTPUT VOLTAGE†
vs
HIGH-LEVEL OUTPUT CURRENT
VDD = 5 V
TA = 125°C
TA = −55°C
TA = 25°C
Figure 14
V
O
L 
− 
L
o
w
-L
ev
el
 O
u
tp
u
t 
Vo
lt
ag
e 
− 
V
0.6
0.4
0.2
0
0 1 2 3
0.8
4 5
VDD = 5 V
TA = 25°C
IOL − Low-Level Output Current − mA
V
O
L
VIC = 1.25 V
LOW-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT CURRENT
1
1.2
VIC = 2.5 V
Figure 15
VIC = 0 V
LOW-LEVEL OUTPUT VOLTAGE†
vs
LOW-LEVEL OUTPUT CURRENT
V
O
L 
− 
L
o
w
-L
ev
el
 O
u
tp
u
t 
Vo
lt
ag
e 
− 
V
IOL − Low-Level Output Current − mA
V
O
L
0.6
0.4
0.2
0
0 1 2 3
0.8
4
1
1.2
5 6
1.4
VDD = 5 V 
VIC = 2.5 V
TA = 125°C
TA = 25°C
TA = −55°C
Figure 16
† Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.

 

	

	  


 

SLOS190G − FEBRUARY 1997 − REVISED MAY 2004
35POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
3
2
1
0 1 2 3 4 5
− 
M
ax
im
u
m
 P
o
si
ti
ve
 P
ea
k 
O
u
tp
u
t 
Vo
lt
ag
e 
− 
V
4
5
MAXIMUM POSITIVE PEAK OUTPUT VOLTAGE†
vs
OUTPUT CURRENT
|IO| − Output Current − mA
TA = −55°C
TA = 25°C
TA = 125°C
VDD± = ±5 V
V
O
M
 +
Figure 17
0 1 2 3 4 5 6
IO − Output Current − mA
MAXIMUM NEGATIVE PEAK OUTPUT VOLTAGE†
vs
OUTPUT CURRENT
VDD = ±5 V
VIC = 0 V
TA = 125°C
TA = 25°C
TA = −55°C
−3.8
−4
−4.2
−4.4
−4.6
−4.8
−5
− 
M
ax
im
u
m
 N
eg
at
iv
e 
P
ea
k 
O
u
tp
u
t 
Vo
lt
ag
e 
− 
V
V
O
M
 −
Figure 18
Figure 19
2
1
0
10 k 100 k 1 M
3
f − Frequency − Hz
4
10 M
6
5
7
8
9
10
MAXIMUM PEAK-TO-PEAK OUTPUT VOLTAGE
vs
FREQUENCY
V
(O
P
P
) 
− 
M
ax
im
u
m
 P
ea
k-
to
-P
ea
k 
O
u
tp
u
t 
Vo
lt
ag
e 
− 
V
V
O
(P
P
)
VDD = 5 V
VDD = ±5 V
RL = 10 kΩ
TA = 25°C
Figure 20
4
0
2 3 4
8
12
16
5 6 7 8
IO
S
 −
 S
h
o
rt
-C
ir
cu
it
 O
u
tp
u
t 
C
u
rr
en
t 
− 
m
A
O
S
I
|VDD±| − Supply Voltage − V
SHORT-CIRCUIT OUTPUT CURRENT
vs
SUPPLY VOLTAGE
VID = 100 mV
VO = 0 V
TA = 25°C
−8
VID = −100 mV
−4
† Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.

 

	

	  


 

SLOS190G − FEBRUARY 1997 − REVISED MAY 2004
36 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
−5
SHORT-CIRCUIT OUTPUT CURRENT†
vs
FREE-AIR TEMPERATURE
−75 −50 −25 0 25 50 75 100 125
−1
−3
7
11
15
IO
S
 −
 S
h
o
rt
-C
ir
cu
it
 O
u
tp
u
t 
C
u
rr
en
t 
− 
m
A
O
S
I
TA − Free-Air Temperature − °C
VID = 100 mV
VID = −100 mV
VO = 0 V
VDD = ±5 V
Figure 21
OUTPUT VOLTAGE
vs
DIFFERENTIAL INPUT VOLTAGE
3
2
1
0
800
4
5
1200
VID − Differential Input Voltage − µV
− 
O
u
tp
u
t 
Vo
lt
ag
e 
− 
V
V
O
−800 −400 4000
VDD = 5 V
TA = 25°C
RL = 10 kΩ
VIC = 2.5 V
Figure 22
1
−1
−3
−5
0 250
3
5
OUTPUT VOLTAGE
vs
DIFFERENTIAL INPUT VOLTAGE
500 750 1000
VID − Differential Input Voltage − µV
− 
O
u
tp
u
t 
Vo
lt
ag
e 
− 
V
V
O
−1000 −750 −250−500
Figure 23
VDD = ±5 V
TA = 25°C
RL = 10 kΩ
VIC = 0 V
0.1
1
0.1 1 10 100
10
100
1000
LARGE-SIGNAL DIFFERENTIAL
VOLTAGE AMPLIFICATION
vs
LOAD RESISTANCE
RL − Load Resistance − kΩ
VO = ±1 V
TA = 25°C
VDD = ±5 V
VDD = 5 V
Figure 24
A
V
D
 −
 L
ar
g
e-
S
ig
n
al
 D
if
fe
re
n
ti
al
ÁÁ
ÁÁ
ÁÁ
A
V
D V
o
lt
ag
e 
A
m
p
lif
ic
at
io
n
 −
 d
B
† Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.

 

	

	  


 

SLOS190G − FEBRUARY 1997 − REVISED MAY 2004
37POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
0
20
1 k 10 k 100 k 1 M
40
60
80
LARGE-SIGNAL DIFFERENTIAL VOLTAGE
AMPLIFICATION AND PHASE MARGIN
vs
FREQUENCY
f − Frequency − Hz
10 M
o
m
 −
 P
h
as
e 
M
ar
g
in
 
φ m
VDD = 5 V
RL = 10  kΩ
CL = 100 pF
TA = 25°C
−20
−40 −90°
−45°
0°
45°
90°
135°
180°
A
V
D
 −
 L
ar
g
e-
S
ig
n
al
 D
if
fe
re
n
ti
al
ÁÁ
ÁÁ
ÁÁ
A
V
D V
o
lt
ag
e 
A
m
p
lif
ic
at
io
n
 −
 d
B
Figure 25
0
20
1 k 10 k 100 k 1 M
40
60
80
LARGE-SIGNAL DIFFERENTIAL VOLTAGE
AMPLIFICATION AND PHASE MARGIN
vs
FREQUENCY
f − Frequency − Hz
10 M 
VDD = ±5 V
RL = 10  kΩ
CL = 100 pF
TA = 25°C
o
m
 −
 P
h
as
e 
M
ar
g
in
 
φ m
−20
−40 −90°
−45°
0°
45°
90°
135°
180°
A
V
D
 −
 L
ar
g
e-
S
ig
n
al
 D
if
fe
re
n
ti
al
ÁÁ
ÁÁ
ÁÁ
A
V
D V
o
lt
ag
e 
A
m
p
lif
ic
at
io
n
 −
 d
B
Figure 26

 

	

	  


 

SLOS190G − FEBRUARY 1997 − REVISED MAY 2004
38 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
LARGE-SIGNAL DIFFERENTIAL
VOLTAGE AMPLIFICATION†
vs
FREE-AIR TEMPERATURE
−75 −50 −25 0 25 50 75 100 125
10
100
1 k
TA − Free-Air Temperature − °C
VDD = 5 V
VIC = 2.5 V
VO = 1 V to 4 V
RL = 1 MΩ
RL = 10  kΩ
A
V
D
 −
 L
ar
g
e-
S
ig
n
al
 D
if
fe
re
n
ti
al
ÁÁ
ÁÁ
A
V
D
V
o
lt
ag
e 
A
m
p
lif
ic
at
io
n
 −
 V
/m
V
Figure 27
LARGE-SIGNAL DIFFERENTIAL
VOLTAGE AMPLIFICATION†
vs
FREE-AIR TEMPERATURE
−75 −50 −25 0 25 50 75 100 125
10
100
1 k
TA − Free-Air Temperature − °C
RL = 1 MΩ
RL = 10  kΩ
VDD = ±5 V
VIC = 0 V
VO = ± 4 V
A
V
D
 −
 L
ar
g
e-
S
ig
n
al
 D
if
fe
re
n
ti
al
ÁÁ
ÁÁ
A
V
D
V
o
lt
ag
e 
A
m
p
lif
ic
at
io
n
 −
 V
/m
V
Figure 28
10
1
0.1
1000
100
100 1 k 10 k 100 k 1 M
zo
 −
 O
u
tp
u
t 
Im
p
ed
an
ce
 −
 O
f − Frequency − Hz
Ω
z o
OUTPUT IMPEDANCE
vs
FREQUENCY
VDD = 5 V
TA = 25°C
AV = 100
AV = 10
AV = 1
Figure 29
10
1
0.1
1000
100
100 1 k 10 k 100 k 1 M
zo
 −
 O
u
tp
u
t 
Im
p
ed
an
ce
 −
 O
f − Frequency − Hz
Ω
z o
OUTPUT IMPEDANCE
vs
FREQUENCY
VDD = ±5 V
TA = 25°C
AV = 100
AV = 10
AV = 1
Figure 30
† Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.

 

	

	  


 

SLOS190G − FEBRUARY 1997 − REVISED MAY 2004
39POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
COMMON-MODE REJECTION RATIO
vs
FREQUENCY
60
40
20
0
10 100 1 k 10 k
C
M
R
R
 −
 C
o
m
m
o
n
-M
o
d
e 
R
ej
ec
ti
o
n
 R
at
io
 −
 d
B
80
100
100 k 1 M
f − Frequency − Hz
VDD = ±5 V
VDD = 5 V
10 M
TA = 25°C
Figure 31
TA − Free-Air Temperature − °C
C
M
R
R
 −
 C
o
m
m
o
n
-M
o
d
e 
R
ej
ec
ti
o
n
 R
at
io
 −
 d
B
COMMON-MODE REJECTION RATIO
vs
FREE-AIR TEMPERATURE
82
78
74
70
86
90
−75 −50 −25 0 25 50 75 100 125
VDD = ±5 V
VDD = 5 V
VIC = 0 V to 2.7 V
VIC = −5 V to 2.7 V
Figure 32
40
20
0
10 100 1 k
kS
V
R
 −
 S
u
p
p
ly
-V
o
lt
ag
e 
R
ej
ec
ti
o
n
 R
at
io
 −
 d
B
60
80
f − Frequency − Hz
100
10 k 100 k 1 M 10 M
SUPPLY-VOLTAGE REJECTION RATIO
vs
FREQUENCY
k
S
V
R
VDD = 5 V
TA = 25°C
kSVR+
kSVR−
−20
Figure 33
40
20
0
10 100 1 k
kS
V
R
 −
 S
u
p
p
ly
-V
o
lt
ag
e 
R
ej
ec
ti
o
n
 R
at
io
 −
 d
B
60
80
f − Frequency − Hz
100
10 k 100 k 1 M 10 M
SUPPLY-VOLTAGE REJECTION RATIO
vs
FREQUENCY
k
S
V
R
VDD = ±5 V
TA = 25°C
kSVR+
kSVR−
−20
Figure 34

 

	

	  


 

SLOS190G − FEBRUARY 1997 − REVISED MAY 2004
40 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
kS
V
R
 −
 S
u
p
p
ly
 V
o
lt
ag
e 
R
ej
ec
ti
o
n
 R
at
io
 −
 d
B
SUPPLY VOLTAGE REJECTION RATIO†
vs
FREE-AIR TEMPERATURE
k
S
V
R
TA − Free-Air Temperature − °C
−75 −50 −25 0 25 50 75 100 125
100
95
90
85
105
110
VDD± = ±2.2 V to ±8 V
VO = 0 V
Figure 35
0 1 2 3 4 5 6 7 8
0
0.6
1.2
1.8
2.4
3
ID
D
 −
 S
u
p
p
ly
 C
u
rr
en
t 
− 
m
A
D
D
I
|VDD± | − Supply Voltage − V
VO = 0 V
No Load
TA = 25°C
TA = −55°C
TA = 125°C
 
Figure 36
TLC2272
SUPPLY CURRENT†
vs
SUPPLY VOLTAGE
Figure 37
0 1 2 3 4 5 6 7 8
0
1.2
2.4
3.6
4.8
6
ID
D
 −
 S
u
p
p
ly
 C
u
rr
en
t 
− 
m
A
D
D
I
|VDD± | − Supply Voltage − V
VO = 0 V
No Load
TA = 25°C
TA = −55°C
TA = 125°C
TLC2274
SUPPLY CURRENT†
vs
SUPPLY VOLTAGE
Figure 38
−75 −50 −25 0 25 50 75 100 125
0
0.6
1.2
1.8
2.4
3
TA − Free-Air Temperature − °C
ID
D
 −
 S
u
p
p
ly
 C
u
rr
en
t 
− 
m
A
D
D
I
VDD = 5 V
VO = 2.5 V
VDD = ±5 V
VO = 0 V
TLC2272
SUPPLY CURRENT†
vs
FREE-AIR TEMPERATURE
† Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.

 

	

	  


 

SLOS190G − FEBRUARY 1997 − REVISED MAY 2004
41POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
Figure 39
−75 −50 −25 0 25 50 75 100 125
0
1.2
2.4
3.6
4.8
6
TA − Free-Air Temperature − °C
ID
D
 −
 S
u
p
p
ly
 C
u
rr
en
t 
− 
m
A
D
D
I
VDD = 5 V
VO = 2.5 V
VDD = ±5 V
VO = 0 V
TLC2274
SUPPLY CURRENT†
vs
FREE-AIR TEMPERATURE
µ
s
S
R
 −
 S
le
w
 R
at
e 
− 
V
/  
 
0
1
2
3
CL − Load Capacitance − pF
SLEW RATE
vs
LOAD CAPACITANCE
10 k1 k10010
SR +
SR −
4
5
VDD = 5 V
AV = −1
TA = 25°C
Figure 40
3
2
1
4
µs
S
R
 −
 S
le
w
 R
at
e 
− 
V
/  
 
−75 −50 −25 0 25 50 75 100 125
TA − Free-Air Temperature − °C
SLEW RATE†
vs
FREE-AIR TEMPERATURE
VDD = 5 V
RL = 10 kΩ
CL = 100 pF
AV = 1
SR +
SR −
0
5
Figure 41
INVERTING LARGE-SIGNAL PULSE RESPONSE
2
1
0
1 2 3 4 5
3
4
5
6 7 8 9
V
O
 −
 O
u
tp
u
t 
Vo
lt
ag
e 
− 
m
V
V
O
t − Time − µs
VDD = 5 V
RL = 10 kΩ
CL = 100 pF
TA = 25°C
AV = −1
0
Figure 42
† Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.

 

	

	  


 

SLOS190G − FEBRUARY 1997 − REVISED MAY 2004
42 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
0
− 1
− 3
− 4
− 5
4
− 2
1 2 3 4 5
2
1
3
5
6 7 8 9
V
O
 −
 O
u
tp
u
t 
Vo
lt
ag
e 
− 
V
V
O
t − Time − µs
VDD = ±5 V
RL = 10 kΩ
CL = 100 pF
TA = 25°C
AV = −1
INVERTING LARGE-SIGNAL PULSE RESPONSE
0
Figure 43
3
2
1
0
1 2 3 4 5
4
5
6 7 8 9
V
O
 −
 O
u
tp
u
t 
Vo
lt
ag
e 
− 
V
V
O
t − Time − µs
VDD = 5 V
RL = 10 kΩ
CL = 100 pF
AV = 1
TA = 25°C
VOLTAGE-FOLLOWER
LARGE-SIGNAL PULSE RESPONSE
0
Figure 44
VOLTAGE-FOLLOWER
LARGE-SIGNAL PULSE RESPONSE
0
−1
4
1 2 3 4 5
2
1
3
5
6 7 8 9
V
O
 −
 O
u
tp
u
t 
Vo
lt
ag
e 
− 
V
V
O
t − Time − µs
VDD = ±5 V
RL = 10 kΩ
CL = 100 pF
TA = 25°C
AV = 1
0
−2
−3
−5
−4
Figure 45
INVERTING SMALL-SIGNAL PULSE RESPONSE
2.5
2.45
2.4
0.5 1 1.5 2 2.5
2.55
2.6
2.65
3.5 4.5 5 5.5
V
O
 −
 O
u
tp
u
t 
Vo
lt
ag
e 
− 
V
V
O
t − Time − µs
VDD = 5 V
RL = 10 kΩ
CL = 100 pF
TA = 25°C
AV = −1
0 3 4
Figure 46

 

	

	  


 

SLOS190G − FEBRUARY 1997 − REVISED MAY 2004
43POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
0
−100
0 0.5 1 1.5 2
50
100
2.5 3 3.5 4
V
O
 −
 O
u
tp
u
t 
Vo
lt
ag
e 
− 
m
V
V
O
t − Time − µs
INVERTING SMALL-SIGNAL PULSE RESPONSE
VDD = ±5 V
RL = 10 kΩ
CL = 100 pF
TA = 25°C
AV = 1
−50
Figure 47
VOLTAGE-FOLLOWER
SMALL-SIGNAL PULSE RESPONSE
2.5
2.45
2.4
2.55
2.6
0 0.5 1 1.5
V
O
 −
 O
u
tp
u
t 
Vo
lt
ag
e 
− 
V
V
O
t − Time − µs
2.65
VDD = 5 V
RL = 10 kΩ
CL = 100 pF
TA = 25°C
AV = 1
Figure 48
VOLTAGE-FOLLOWER
SMALL-SIGNAL PULSE RESPONSE
0
−50
−100
50
100
0 0.5 1 1.5
V
O
 −
 O
u
tp
u
t 
Vo
lt
ag
e 
− 
m
V
V
O
t − Time − µs
VDD = ±5 V
RL = 10 kΩ
CL = 100 pF
TA = 25°C
AV = 1
Figure 49
20
10
0
10 100 1 k
V
n
 −
 E
q
u
iv
al
en
t 
In
p
u
t 
N
o
is
e 
Vo
lt
ag
e 
− 
n
V
 H
z
30
f − Frequency − Hz
40
10 k
EQUIVALENT INPUT NOISE VOLTAGE
vs
FREQUENCY
50
60
V
n
n
V
/
H
z VDD = 5 V
TA = 25°C
RS = 20 Ω
Figure 50

 

	

	  


 

SLOS190G − FEBRUARY 1997 − REVISED MAY 2004
44 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
20
10
0
10 100 1 k
V
n
 −
 E
q
u
iv
al
en
t 
In
p
u
t 
N
o
is
e 
Vo
lt
ag
e 
− 
n
V
 H
z
30
f − Frequency − Hz
40
10 k
EQUIVALENT INPUT NOISE VOLTAGE
vs
FREQUENCY
50
60
V
n
n
V
/
H
z
VDD = ±5 V
TA = 25°C
RS = 20 Ω
Figure 51
−750
−1000
2 4 6
0
250
8 10
N
o
is
e 
Vo
lt
ag
e 
− 
n
V
t − Time − s
NOISE VOLTAGE
OVER A 10 SECOND PERIOD
0
VDD = 5 V
f = 0.1 Hz to 10 Hz
TA = 25°C
500
750
1000
−250
−500
Figure 52
In
te
g
ra
te
d
 N
o
is
e 
Vo
lt
ag
e 
− 
u
V
R
M
S
1
0.1
100
1 10 100 1 k
f − Frequency − Hz
INTEGRATED NOISE VOLTAGE
vs
FREQUENCY
10 k 100 k
V
R
M
S
µ
Calculated Using
Ideal Pass-Band Filter
Lower Frequency = 1 Hz
TA= 25°C
10
Figure 53
0.0001
0.001
100 1 k 10 k 100 k
T
H
D
 +
 N
 −
 T
o
ta
l H
ar
m
o
n
ic
 D
is
to
rt
io
n
 P
lu
s 
N
o
is
e 
− 
%
f − Frequency − Hz
TOTAL HARMONIC DISTORTION PLUS NOISE
vs
FREQUENCY
0.01
0.1
1
VDD = 5 V
TA = 25°C
RL = 10 kΩ
AV = 100
AV = 10
AV = 1
Figure 54

 

	

	  


 

SLOS190G − FEBRUARY 1997 − REVISED MAY 2004
45POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
Figure 55
G
ai
n
-B
an
d
w
id
th
 P
ro
d
u
ct
 −
 M
H
z
2.1
2
0 1 2 3 4 5
2.2
2.3
6 7 8
|VDD±| − Supply Voltage − V
2.4
2.5
GAIN-BANDWIDTH PRODUCT
vs
SUPPLY VOLTAGE
f = 10 kHz
RL = 10 kΩ
CL = 100 pF
TA = 25°C
Figure 56
−75 −50 −25 0 25 50 75 100 125
TA − Free-Air Temperature − °C
G
ai
n
-B
an
d
w
id
th
 P
ro
d
u
ct
 −
 M
H
z
GAIN-BANDWIDTH PRODUCT†
vs
FREE-AIR TEMPERATURE
1.8
1.6
1.4
2
2.4
2.2
2.6
2.8
3
VDD = 5 V
f = 10 kHz
RL = 10 kΩ
CL = 100 pF
10
o
m
 −
 P
h
as
e 
M
ar
g
in
 
10000
CL − Load Capacitance − pF
φ
m
PHASE MARGIN
vs
LOAD CAPACITANCE
1000100
VDD = ±5 V
TA = 25°C
Rnull = 20 Ω
Rnull = 10 Ω
Rnull = 0
75°
60°
45°
30°
15°
0°
10 kΩ
10 kΩ
VDD −
VDD +
Rnull
CL
VI
Rnull = 100 Ω
Rnull = 50 Ω
Figure 57 Figure 58
3
0
10
G
ai
n
 M
ar
g
in
 −
 d
B
6
9
10000
CL − Load Capacitance − pF
12
15
GAIN MARGIN
vs
LOAD CAPACITANCE
1000100
VDD = 5 V
AV = 1
RL = 10 kΩ
TA = 25°C
† Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.

 

	

	  


 

SLOS190G − FEBRUARY 1997 − REVISED MAY 2004
46 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
APPLICATION INFORMATION
macromodel information
Macromodel information provided was derived using Microsim Parts , the model generation software used
with Microsim PSpice. The Boyle macromodel (see Note 5) and subcircuit in Figure 59 were generated using
the TLC227x typical electrical and operating characteristics at TA = 25°C. Using this information, output
simulations of the following key parameters can be generated to a tolerance of 20% (in most cases):

 Maximum positive output voltage swing

 Maximum negative output voltage swing

 Slew rate

 Quiescent power dissipation

 Input bias current

 Open-loop voltage amplification

 Unity gain frequency

 Common-mode rejection ratio

 Phase margin

 DC output resistance

 AC output resistance

 Short-circuit output current limit
NOTE 5: G. R. Boyle, B. M. Cohn, D. O. Pederson, and J. E. Solomon, “Macromodeling of Integrated Circuit Operational Amplifiers”, IEEE Journal
of Solid-State Circuits, SC-9, 353 (1974).
OUT
+
−
+
−
+
−
+
−
+
−
+
−
+
− +
−
+−
.SUBCKT TLC227x 1 2 3 4 5
C1 11 1214E−12
C2 6 760.00E−12
DC 5 53DX
DE 54 5DX
DLP 90 91DX
DLN 92 90DX
DP 4 3DX
EGND 99 0POLY (2) (3,0) (4,) 0 .5 .5
FB 99 0POLY (5) VB VC VE VLP VLN 0
+ 984.9E3 −1E6 1E6 1E6 −1E6
GA 6 011 12 377.0E−6
GCM 0 6 10 99 134E−9
ISS 3 10DC 216.OE−6
HLIM 90 0VLIM 1K
J1 11 210 JX
J2 12 110 JX
R2 6 9100.OE3
RD1 60 112.653E3
RD2 60 122.653E3
R01 8 550
R02 7 9950
RP 3 44.310E3
RSS 10 99925.9E3
VAD 60 4−.5
VB 9 0DC 0
VC 3 53 DC .78
VE 54 4DC .78
VLIM 7 8DC 0
VLP 91 0DC 1.9
VLN 0 92DC 9.4
.MODEL DX D (IS=800.0E−18)
.MODEL JX PJF (IS=1.500E−12BETA=1.316E-3
+ VTO=−.270)
.ENDS
VCC+
RP
IN −
2
IN+
1
VCC−
VAD
RD1
11
J1 J2
10
RSS ISS
3
12
RD2
60
VE
54
DE
DP
VC
DC
4
C1
53
R2
6
9
EGND
VB
FB
C2
GCM GA VLIM
8
5
RO1
RO2
HLIM
90
DIP
91
DIN
92
VINVIP
99
7
Figure 59. Boyle Macromodel and Subcircuit
PSpice and Parts are trademarks of MicroSim Corporation.

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		 &+ 

	
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)
"#"
#  ")
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" " *)
) ") !	' '"#(
PACKAGING INFORMATION
Orderable Device Status (1) Package
Type
Package
Drawing
Pins Package
Qty
Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
5962-9318201M2A ACTIVE LCCC FK 20 1 TBD POST-PLATE Level-NC-NC-NC
5962-9318201MCA ACTIVE CDIP J 14 1 TBD A42 SNPB Level-NC-NC-NC
5962-9318201QDA ACTIVE CFP W 14 1 TBD A42 SNPB Level-NC-NC-NC
5962-9318202Q2A ACTIVE LCCC FK 20 1 TBD POST-PLATE Level-NC-NC-NC
5962-9318202QCA ACTIVE CDIP J 14 1 TBD A42 SNPB Level-NC-NC-NC
5962-9318202QDA ACTIVE CFP W 14 1 TBD A42 SNPB Level-NC-NC-NC
5962-9555201NXDR ACTIVE SOIC D 8 2500 TBD CU NIPDAU Level-1-220C-UNLIM
5962-9555201Q2A ACTIVE LCCC FK 20 1 TBD POST-PLATE Level-NC-NC-NC
5962-9555201QHA ACTIVE CFP U 10 1 TBD A42 SNPB Level-NC-NC-NC
5962-9555201QPA ACTIVE CDIP JG 8 1 TBD A42 SNPB Level-NC-NC-NC
5962-9555202Q2A ACTIVE LCCC FK 20 1 TBD POST-PLATE Level-NC-NC-NC
5962-9555202QHA ACTIVE CFP U 10 1 TBD A42 SNPB Level-NC-NC-NC
5962-9555202QPA ACTIVE CDIP JG 8 1 TBD A42 SNPB Level-NC-NC-NC
TLC2272ACD ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
TLC2272ACDG4 ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
TLC2272ACDR ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
TLC2272ACDRG4 ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
TLC2272ACP ACTIVE PDIP P 8 50 Pb-Free
(RoHS)
CU NIPDAU Level-NC-NC-NC
TLC2272ACPE4 ACTIVE PDIP P 8 50 Pb-Free
(RoHS)
CU NIPDAU Level-NC-NC-NC
TLC2272ACPW ACTIVE TSSOP PW 8 150 Green (RoHS &
no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
TLC2272ACPWLE OBSOLETE TSSOP PW 8 TBD Call TI Call TI
TLC2272ACPWR ACTIVE TSSOP PW 8 2000 Green (RoHS &
no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
TLC2272AID ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
TLC2272AIDG4 ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
TLC2272AIDR ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
TLC2272AIDRG4 ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
TLC2272AIP ACTIVE PDIP P 8 50 Pb-Free
(RoHS)
CU NIPDAU Level-NC-NC-NC
TLC2272AIPE4 ACTIVE PDIP P 8 50 Pb-Free
(RoHS)
CU NIPDAU Level-NC-NC-NC
TLC2272AMD ACTIVE SOIC D 8 75 TBD CU NIPDAU Level-1-220C-UNLIM
TLC2272AMDR ACTIVE SOIC D 8 2500 TBD CU NIPDAU Level-1-220C-UNLIM
TLC2272AMFKB ACTIVE LCCC FK 20 1 TBD POST-PLATE Level-NC-NC-NC
TLC2272AMJGB ACTIVE CDIP JG 8 1 TBD A42 SNPB Level-NC-NC-NC
PACKAGE OPTION ADDENDUM
www.ti.com 21-Nov-2005
Addendum-Page 1
Orderable Device Status (1) Package
Type
Package
Drawing
Pins Package
Qty
Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
TLC2272AMP OBSOLETE PDIP P 8 TBD Call TI Call TI
TLC2272AMUB ACTIVE CFP U 10 1 TBD A42 SNPB Level-NC-NC-NC
TLC2272AQD ACTIVE SOIC D 8 75 TBD CU NIPDAU Level-1-220C-UNLIM
TLC2272AQDR ACTIVE SOIC D 8 2500 TBD CU NIPDAU Level-1-220C-UNLIM
TLC2272CD ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
TLC2272CDR ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
TLC2272CP ACTIVE PDIP P 8 50 Pb-Free
(RoHS)
CU NIPDAU Level-NC-NC-NC
TLC2272CPE4 ACTIVE PDIP P 8 50 Pb-Free
(RoHS)
CU NIPDAU Level-NC-NC-NC
TLC2272CPSR ACTIVE SO PS 8 2000 Green (RoHS &
no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
TLC2272CPSRG4 ACTIVE SO PS 8 2000 Green (RoHS &
no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
TLC2272CPW ACTIVE TSSOP PW 8 150 Green (RoHS &
no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
TLC2272CPWG4 ACTIVE TSSOP PW 8 150 Green (RoHS &
no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
TLC2272CPWLE OBSOLETE TSSOP PW 8 TBD Call TI Call TI
TLC2272CPWR ACTIVE TSSOP PW 8 2000 Green (RoHS &
no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
TLC2272CPWRG4 ACTIVE TSSOP PW 8 2000 Green (RoHS &
no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
TLC2272ID ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
TLC2272IDG4 ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
TLC2272IDR ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
TLC2272IDRG4 ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
TLC2272IP ACTIVE PDIP P 8 50 Pb-Free
(RoHS)
CU NIPDAU Level-NC-NC-NC
TLC2272IPE4 ACTIVE PDIP P 8 50 Pb-Free
(RoHS)
CU NIPDAU Level-NC-NC-NC
TLC2272IPW ACTIVE TSSOP PW 8 150 Green (RoHS &
no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
TLC2272IPWLE OBSOLETE TSSOP PW 8 TBD Call TI Call TI
TLC2272IPWR ACTIVE TSSOP PW 8 2000 Green (RoHS &
no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
TLC2272MD ACTIVE SOIC D 8 75 TBD CU NIPDAU Level-1-220C-UNLIM
TLC2272MDR ACTIVE SOIC D 8 2500 TBD CU NIPDAU Level-1-220C-UNLIM
TLC2272MFKB ACTIVE LCCC FK 20 1 TBD POST-PLATE Level-NC-NC-NC
TLC2272MJG ACTIVE CDIP JG 8 1 TBD A42 SNPB Level-NC-NC-NC
TLC2272MJGB ACTIVE CDIP JG 8 1 TBD A42 SNPB Level-NC-NC-NC
TLC2272MP OBSOLETE PDIP P 8 TBD Call TI Call TI
TLC2272MUB ACTIVE CFP U 10 1 TBD A42 SNPB Level-NC-NC-NC
PACKAGE OPTION ADDENDUM
www.ti.com 21-Nov-2005
Addendum-Page 2
Orderable Device Status (1) Package
Type
Package
Drawing
Pins Package
Qty
Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
TLC2272QD ACTIVE SOIC D 8 75 TBD CU NIPDAU Level-1-220C-UNLIM
TLC2272QDR ACTIVE SOIC D 8 2500 TBD CU NIPDAU Level-1-220C-UNLIM
TLC2272QPWR ACTIVE TSSOP PW 8 2000 TBD CU NIPDAU Level-1-220C-UNLIM
TLC2274ACD ACTIVE SOIC D 14 50 Green (RoHS &
no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
TLC2274ACDG4 ACTIVE SOIC D 14 50 Green (RoHS &
no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
TLC2274ACDR ACTIVE SOIC D 14 2500 Green (RoHS &
no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
TLC2274ACDRG4 ACTIVE SOIC D 14 2500 Green (RoHS &
no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
TLC2274ACN ACTIVE PDIP N 14 25 Pb-Free
(RoHS)
CU NIPD Level-NC-NC-NC
TLC2274ACNE4 ACTIVE PDIP N 14 25 Pb-Free
(RoHS)
CU NIPD Level-NC-NC-NC
TLC2274ACPW ACTIVE TSSOP PW 14 90 Green (RoHS &
no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
TLC2274ACPWG4 ACTIVE TSSOP PW 14 90 Green (RoHS &
no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
TLC2274ACPWR ACTIVE TSSOP PW 14 2000 Green (RoHS &
no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
TLC2274ACPWRG4 ACTIVE TSSOP PW 14 2000 Green (RoHS &
no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
TLC2274AID ACTIVE SOIC D 14 50 Green (RoHS &
no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
TLC2274AIDG4 ACTIVE SOIC D 14 50 Green (RoHS &
no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
TLC2274AIDR ACTIVE SOIC D 14 2500 Green (RoHS &
no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
TLC2274AIDRG4 ACTIVE SOIC D 14 2500 Green (RoHS &
no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
TLC2274AIN ACTIVE PDIP N 14 25 Pb-Free
(RoHS)
CU NIPD Level-NC-NC-NC
TLC2274AINE4 ACTIVE PDIP N 14 25 Pb-Free
(RoHS)
CU NIPD Level-NC-NC-NC
TLC2274AIPW ACTIVE TSSOP PW 14 90 Green (RoHS &
no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
TLC2274AIPWG4 ACTIVE TSSOP PW 14 90 Green (RoHS &
no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
TLC2274AIPWLE OBSOLETE TSSOP PW 14 TBD Call TI Call TI
TLC2274AIPWR ACTIVE TSSOP PW 14 2000 Green (RoHS &
no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
TLC2274AIPWRG4 ACTIVE TSSOP PW 14 2000 Green (RoHS &
no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
TLC2274AMD ACTIVE SOIC D 14 50 TBD CU NIPDAU Level-1-220C-UNLIM
TLC2274AMDR ACTIVE SOIC D 14 2500 TBD CU NIPDAU Level-1-220C-UNLIM
TLC2274AMFKB ACTIVE LCCC FK 20 1 TBD POST-PLATE Level-NC-NC-NC
TLC2274AMJB ACTIVE CDIP J 14 1 TBD A42 SNPB Level-NC-NC-NC
TLC2274AMWB ACTIVE CFP W 14 1 TBD A42 SNPB Level-NC-NC-NC
TLC2274AQD ACTIVE SOIC D 14 50 TBD CU NIPDAU Level-1-220C-UNLIM
PACKAGE OPTION ADDENDUM
www.ti.com 21-Nov-2005
Addendum-Page 3
Orderable Device Status (1) Package
Type
Package
Drawing
Pins Package
Qty
Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
TLC2274AQDR ACTIVE SOIC D 14 2500 TBD CU NIPDAU Level-1-220C-UNLIM
TLC2274CD ACTIVE SOIC D 14 50 Green (RoHS &
no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
TLC2274CDG4 ACTIVE SOIC D 14 50 Green (RoHS &
no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
TLC2274CDR ACTIVE SOIC D 14 2500 Green (RoHS &
no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
TLC2274CDRG4 ACTIVE SOIC D 14 2500 Green (RoHS &
no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
TLC2274CN ACTIVE PDIP N 14 25 Pb-Free
(RoHS)
CU NIPD Level-NC-NC-NC
TLC2274CNE4 ACTIVE PDIP N 14 25 Pb-Free
(RoHS)
CU NIPD Level-NC-NC-NC
TLC2274CNSR ACTIVE SO NS 14 2000 Green (RoHS &
no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
TLC2274CNSR-A ACTIVE SO NS 14 2000 Green (RoHS &
no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
TLC2274CNSRG4 ACTIVE SO NS 14 2000 Green (RoHS &
no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
TLC2274CPW ACTIVE TSSOP PW 14 90 Green (RoHS &
no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
TLC2274CPWG4 ACTIVE TSSOP PW 14 90 Green (RoHS &
no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
TLC2274CPWLE OBSOLETE TSSOP PW 14 TBD Call TI Call TI
TLC2274CPWR ACTIVE TSSOP PW 14 2000 Green (RoHS &
no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
TLC2274CPWRG4 ACTIVE TSSOP PW 14 2000 Green (RoHS &
no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
TLC2274ID ACTIVE SOIC D 14 50 Green (RoHS &
no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
TLC2274IDG4 ACTIVE SOIC D 14 50 Green (RoHS &
no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
TLC2274IDR ACTIVE SOIC D 14 2500 Green (RoHS &
no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
TLC2274IDRG4 ACTIVE SOIC D 14 2500 Green (RoHS &
no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
TLC2274IN ACTIVE PDIP N 14 25 Pb-Free
(RoHS)
CU NIPD Level-NC-NC-NC
TLC2274INE4 ACTIVE PDIP N 14 25 Pb-Free
(RoHS)
CU NIPD Level-NC-NC-NC
TLC2274IPW ACTIVE TSSOP PW 14 90 Green (RoHS &
no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
TLC2274IPWLE OBSOLETE TSSOP PW 14 TBD Call TI Call TI
TLC2274IPWR ACTIVE TSSOP PW 14 2000 Green (RoHS &
no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
TLC2274IPWRG4 ACTIVE TSSOP PW 14 2000 Green (RoHS &
no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
TLC2274MD ACTIVE SOIC D 14 50 TBD CU NIPDAU Level-1-220C-UNLIM
TLC2274MDR ACTIVE SOIC D 14 2500 TBD CU NIPDAU Level-1-220C-UNLIM
TLC2274MFKB ACTIVE LCCC FK 20 1 TBD POST-PLATE Level-NC-NC-NC
PACKAGE OPTION ADDENDUM
www.ti.com 21-Nov-2005
Addendum-Page 4
Orderable Device Status (1) Package
Type
Package
Drawing
Pins Package
Qty
Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
TLC2274MJ ACTIVE CDIP J 14 1 TBD A42 SNPB Level-NC-NC-NC
TLC2274MJB ACTIVE CDIP J 14 1 TBD A42 SNPB Level-NC-NC-NC
TLC2274MN ACTIVE PDIP N 14 25 Pb-Free
(RoHS)
CU NIPD Level-NC-NC-NC
TLC2274MWB ACTIVE CFP W 14 1 TBD A42 SNPB Level-NC-NC-NC
TLC2274QD ACTIVE SOIC D 14 50 TBD CU NIPDAU Level-1-220C-UNLIM
TLC2274QDR ACTIVE SOIC D 14 2500 TBD CU NIPDAU Level-1-220C-UNLIM
TLC2274Y PREVIEW XCEPT Y 0 TBD Call TI Call TI
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
PACKAGE OPTION ADDENDUM
www.ti.com 21-Nov-2005
Addendum-Page 5
MECHANICAL DATA
MCER001A – JANUARY 1995 – REVISED JANUARY 1997
POST OFFICE BOX 655303 •  DALLAS, TEXAS 75265
JG (R-GDIP-T8) CERAMIC DUAL-IN-LINE
0.310 (7,87)
0.290 (7,37)
0.014 (0,36)
0.008 (0,20)
Seating Plane
4040107/C 08/96
5
4
0.065 (1,65)
0.045 (1,14)
8
1
0.020 (0,51) MIN
0.400 (10,16)
0.355 (9,00)
0.015 (0,38)
0.023 (0,58)
0.063 (1,60)
0.015 (0,38)
0.200 (5,08) MAX
0.130 (3,30) MIN
0.245 (6,22)
0.280 (7,11)
0.100 (2,54)
0°–15°
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. This package can be hermetically sealed with a ceramic lid using glass frit.
D. Index point is provided on cap for terminal identification.
E. Falls within MIL STD 1835 GDIP1-T8

MECHANICAL DATA
MCFP001A – JANUARY 1995 – REVISED DECEMBER 1995
POST OFFICE BOX 655303 •  DALLAS, TEXAS 75265
U (S-GDFP-F10) CERAMIC DUAL FLATPACK
4040179/B 03/95
0.080 (2,03)
0.250 (6,35)
0.019 (0,48)
4 Places
0.300 (7,62) MAX
0.045 (1,14)
0.008 (0,20)
0.050 (1,27)
0.015 (0,38)
0.005 (0,13) MIN
0.026 (0,66)
0.004 (0,10)
0.246 (6,10)
1 10
5 6
0.250 (6,35)
0.350 (8,89)0.350 (8,89)
0.250 (6,35)
0.050 (1,27)
Base and Seating Plane
0.280 (7,11)
0.230 (5,84)
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. This package can be hermetically sealed with a ceramic lid using glass frit.
D. Index point is provided on cap for terminal identification only.
E. Falls within MIL STD 1835 GDFP1-F10 and JEDEC MO-092AA

 MECHANICAL DATA
 
 
 MLCC006B – OCTOBER 1996
POST OFFICE BOX 655303 •  DALLAS, TEXAS 75265
FK (S-CQCC-N**)     LEADLESS CERAMIC CHIP CARRIER
4040140/D 10/96
28 TERMINAL SHOWN
B
0.358
(9,09)
MAX
(11,63)
0.560
(14,22)
0.560
0.458
0.858
(21,8)
1.063
(27,0)
(14,22)
ANO. OF
MINMAX
0.358
0.660
0.761
0.458
0.342
(8,69)
MIN
(11,23)
(16,26)
0.640
0.739
0.442
(9,09)
(11,63)
(16,76)
0.962
1.165
(23,83)
0.938
(28,99)
1.141
(24,43)
(29,59)
(19,32)(18,78)
**
20
28
52
44
68
84
0.020 (0,51)
TERMINALS
0.080 (2,03)
0.064 (1,63)
(7,80)
0.307
(10,31)
0.406
(12,58)
0.495
(12,58)
0.495
(21,6)
0.850
(26,6)
1.047
0.045 (1,14)
0.045 (1,14)
0.035 (0,89)
0.035 (0,89)
0.010 (0,25)
121314151618 17
11
10
8
9
7
5
432
0.020 (0,51)
0.010 (0,25)
6
12826 27
19
21
B SQ
A SQ
22
23
24
25
20
0.055 (1,40)
0.045 (1,14)
0.028 (0,71)
0.022 (0,54)
0.050 (1,27)
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. This package can be hermetically sealed with a metal lid.
D. The terminals are gold plated.
E. Falls within JEDEC MS-004
MECHANICAL DATA
MPDI001A – JANUARY 1995 – REVISED JUNE 1999
POST OFFICE BOX 655303 •  DALLAS, TEXAS 75265
P (R-PDIP-T8) PLASTIC DUAL-IN-LINE
8
4
0.015 (0,38)
Gage Plane
0.325 (8,26)
0.300 (7,62)
0.010 (0,25) NOM
MAX
0.430 (10,92)
4040082/D 05/98
0.200 (5,08) MAX
0.125 (3,18) MIN
5
0.355 (9,02)
0.020 (0,51) MIN
0.070 (1,78) MAX
0.240 (6,10)
0.260 (6,60)
0.400 (10,60)
1
0.015 (0,38)
0.021 (0,53)
Seating Plane
M0.010 (0,25)
0.100 (2,54)
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. Falls within JEDEC MS-001
For the latest package information, go to http://www.ti.com/sc/docs/package/pkg_info.htm





 MECHANICAL DATA
 
 
 MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999
POST OFFICE BOX 655303 •  DALLAS, TEXAS 75265
PW (R-PDSO-G**)   PLASTIC SMALL-OUTLINE PACKAGE
14 PINS SHOWN
0,65 M0,10
0,10
0,25
0,50
0,75
0,15 NOM
Gage Plane
28
9,80
9,60
24
7,90
7,70
2016
6,60
6,40
4040064/F 01/97
0,30
6,60
6,20
8
0,19
4,30
4,50
7
0,15
14
A
1
1,20 MAX
14
5,10
4,90
8
3,10
2,90
A  MAX
A  MIN
DIM
PINS **
0,05
4,90
5,10
Seating Plane
0°–8°
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. Falls within JEDEC MO-153
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